Solutions_midterm1_w10 - Carleton University Department of...

Info iconThis preview shows pages 1–2. Sign up to view the full content.

View Full Document Right Arrow Icon
sys-4405, winter 2010, midterm1 page 1 of 4 Carleton University Department of Systems and Computer Engineering SYSC-4405 Digital Signal Processing Winter Semester 2010 Midterm # 1 February 4, 2010, 45 minutes. ______________________________________________________________________________ Answer the following questions Question 1 A simplified block diagram of a DSP system is shown below. The input and output signals of the system are both analog. Write a brief statement explaining the function performed by each of the building blocks shown on the diagram. The anti aliasing filter: limit the bandwidth of the input signal, before it reaches the A/D converter, to a maximum of half the sampling rate. It is needed to avoid potential aliasing. The sample & hold device: latches the value (in volts) of the input signal for a short duration , once every clock cycle. It is needed to allow the quantizer time to convert the voltage reading to one of a predeter- mined set of levels. The A/D converter includes the sample&hold, quantizer plus an encoder to transform the quantized levels to binary words. The function of the D/A converter is complementary to that of the A/D. The output of this device is a stair- case representation of the signal produced by the DSP subsystem.
Background image of page 1

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
Image of page 2
This is the end of the preview. Sign up to access the rest of the document.

This document was uploaded on 04/14/2010.

Page1 / 4

Solutions_midterm1_w10 - Carleton University Department of...

This preview shows document pages 1 - 2. Sign up to view the full document.

View Full Document Right Arrow Icon
Ask a homework question - tutors are online