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lecture2 - ELEC 303 ASIC Design with FPGA Ho-Chi Huang,...

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Unformatted text preview: ELEC 303 ASIC Design with FPGA Ho-Chi Huang, Lecture Notes, No. 2-1 Introduction to FPGA • Evolution of Programmable Logic Devices (PLD) – Simple PLD » Combinational PLD • Programmable Read-Only Memory (PROM) • Programmable Logic Array (PLA) • Programmable Array Logic (PAL) » Sequential PLD (SPLD?) – Complex PLD » CPLD, FPGA • Field Programmable Gate Array (FPGA) – Design flow – Structures, logic blocks and programming technologies – FPGA example • Self Reading Assignment – Chapter 7, M. Morris Mano, Digital Design, Prentice Hall, 2002 ELEC 303 ASIC Design with FPGA Ho-Chi Huang, Lecture Notes, No. 2-2 Programmable Logic Device Families Acronyms ASIC = Application Specific Integrated Circuit SPLD = Simple Programmable Logic Device CPLD = Complex PLD FPGA = Field Programmable Gate Array Programmable Logic Device (PLD) Digital Logic Standard Logic ASIC Gate Array Cell-Based IC Full Custom IC CPLD Simple PLD FPGA PROM PAL PLA Sequential PLD ELEC 303 ASIC Design with FPGA Ho-Chi Huang, Lecture Notes, No. 2-3 Four Simple Programmable Logic Devices • Three are Combinational • One is Sequential ELEC 303 ASIC Design with FPGA Ho-Chi Huang, Lecture Notes, No. 2-4 Programmable Read-Only Memory (PROM) • Decoder + OR is one kind of logic design • Decoder provides all the product terms (AND of inputs) – k inputs for 2 k product terms – All the product terms are available for every OR gate • OR gate selects the product terms for outputs – Different OR gate has different product terms for different functions – OR array is programmable – n OR gates for n outputs ELEC 303 ASIC Design with FPGA Ho-Chi Huang, Lecture Notes, No. 2-5 Programmable Read-Only Memory (PROM) ELEC 303 ASIC Design with FPGA Ho-Chi Huang, Lecture Notes, No. 2-6 Use of PROM for Combinational Logic Design • Given project specifications – 5 inputs, 8 outputs • Derive the truth table • K-map ? – No Inputs Outputs I4 I3 I2 I1 I0 A7 A6 A5 A4 A3 A2 A1 A0 0 0 0 0 1 0 1 1 0 1 1 0 0 0 0 1 0 0 0 1 1 1 0 1 0 0 0 1 1 1 0 0 0 1 0 1 0 0 0 1 1 1 0 1 1 0 0 1 1 1 1 0 0 0 0 0 1 0 0 1 1 1 1 0 1 1 1 1 0 0 0 1 1 1 1 1 0 1 0 0 1 0 1 1 1 1 1 1 0 0 1 1 0 0 1 1 ELEC 303 ASIC Design with FPGA Ho-Chi Huang, Lecture Notes, No. 2-7 Use of PROM for Combinational Logic Design • Download the table to the PROM by a programmer – blow or retain the fuses for open or short • 32-input OR? ELEC 303 ASIC Design with FPGA Ho-Chi Huang, Lecture Notes, No. 2-8 Types of PROM • PROM: Programmable ROM – “Programmable switches “ on each interconnection » can be programmed by high voltage to close or open (z) » cannot be re-used once it is programmed • EPROM: Erasable Programmable ROM by UV light • EEPROM: Electrically-Erasable PROM by voltage Decoder n-1 2 -1 n j i ELEC 303 ASIC Design with FPGA Ho-Chi Huang, Lecture Notes, No. 2-9 Programmable Logic Array • In popular AND-OR (or NAND-NAND) structure • Programmable AND - Programmable OR • AND gates produces...
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This note was uploaded on 04/14/2010 for the course ELEC 303 taught by Professor Nil during the Spring '02 term at HKUST.

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lecture2 - ELEC 303 ASIC Design with FPGA Ho-Chi Huang,...

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