Lecture_11 - ECE 445 Computer Organization Multi-cycle...

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ECE 445 – Computer Organization Multi-cycle Processor (Lecture #11)
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ECE 445 - Computer Organization 2 Comparison Multi-cycle Single-cycle Each step takes one clock cycle Each instruction takes one clock cycle Re-use functional units more than once per instruction Dedicated functional units (only used once per instruction) One adder (in the ALU) Multiple adders Different number of clock cycles per instruction One clock cycle per instruction (for all instructions) Single memory unit for instructions and data Two memory units, one for instructions and one for data More complex control (State Machine) Simple control (Boolean Logic)
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ECE 445 - Computer Organization 3 A multi-cycle processor is realized through the addition of registers after each of the major functional units (to hold the values between the steps of the instruction)
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ECE 445 - Computer Organization 4 Fig. 5.26 (p. 320) with proper annotation data address instruction address Looks like output of Data Memory Looks like output of Instruction Memory Muxes select which inputs ALU will operate on
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ECE 445 - Computer Organization 5 Fig. 5.28 (p. 323)
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ECE 445 - Computer Organization 6 Instruction Execution Steps
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ECE 445 - Computer Organization 7 Instruction Execution Steps 1. Instruction Fetch 2. Instruction Decode and Register Fetch 3. Execution, Memory address computation, or Branch completion 4. Memory access or R-type instruction completion 5. Memory read completion
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This note was uploaded on 04/15/2010 for the course ECE 445 taught by Professor Tabak,d during the Spring '08 term at George Mason.

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Lecture_11 - ECE 445 Computer Organization Multi-cycle...

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