03b CMOS Logic

03b CMOS Logic - EE115C Winter 2010 Digital Electronic...

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EE115C – Winter 2010 igital Electronic Circuits Digital Electronic Circuits Lecture 3b: Static CMOS Logic
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Positive and Negative Logic Switches V A A Switch ON when A = 1 V A A Switch ON when A = 0 EE115C 2
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Example: NAND Gate ± ut = 1 or “Pull- p” Out 1 or Pull Up At least one path exists from V DD to Out ± Out = 0 or “Pull-Down” t least one path exists from ground to Out 3 At least one path exists from ground to Out EE115C
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Example: NOR Gate ± ut = 1 or “Pull- p” Out 1 or Pull Up At least one path exists from V DD to Out ± Out = 0 or “Pull-Down” t least one path exists from ground to Out 4 At least one path exists from ground to Out EE115C
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General Static CMOS Logic Gate V DD F(In 1 ,In 2 ,…In N ) In 1 In 2 In N PUP PMOS only Out In 1 In 2 In N PDN NMOS only ± For cases when F(In 1 ,…In N ) = 1 “Pull-Down” network (PDN) has at least one path from Out to ground () p g “Pull-Up” network (PUP) has no paths from V DD to ground ± For cases when F(In 1 ,…In N ) = 0 i.e. when F(In 1 ,…In N ) = 1 UP has a path (from V but PDN has no path (from ground)
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03b CMOS Logic - EE115C Winter 2010 Digital Electronic...

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