90nm DRM file

90nm DRM file - Sep 27, 2006 GPDK 90nm Mixed Signal Process...

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Unformatted text preview: Sep 27, 2006 GPDK 90nm Mixed Signal Process Spec page i revision 3.4 Table of Contents Revision History 2 Generator Info 3 Global Parameters 3 Introduction 4 Terminology Definitions 5 Layer Descriptions 6 Table 1: Device Layers 6 Table 2: Interconnect Layers 7 Table 3: DRC/LVS Marker/Label Layers 8 Device Layer Table 9 Table 4: MOS Device Layers 9 Table 5: Diode Device Layers 9 Table 6: Resistor Device Layers 10 Table 7: Bipolar and Varactor Device Layers 11 Device Layout Examples 12 CMOS Digital Core Design Rules 15 N BURIED LAYER RULES 15 NWELL AND NWELL RESISTOR (under STI) RULES 17 NWELL RESISTOR WITHIN OXIDE RULES 19 Figure 1: NWELL RESISTOR WITHIN OXIDE RULES 19 ACTIVE RULES 21 ACTIVE RESISTOR RULES (salicided/non-salicided) 23 THICK ACTIVE (2.5V) RULES 25 N+ HIGH VT RULES 27 Sep 27, 2006 GPDK 90nm Mixed Signal Process Spec page ii revision 3.4 ...contents. .. P+ HIGH VT RULES 28 NATIVE NMOS ACTIVE RULES 29 POLY RULES 30 POLY RESISTOR RULES (salicided/non-salicided) 34 N+ IMPLANT RULES 36 P+ IMPLANT RULES 38 CONTACT RULES 40 SALICIDE BLOCKING RULES 43 METAL 1 RULES 44 METAL k (k = 2, 3, 4, 5, 6, 7) RULES 45 METAL k (k = 8, 9) RULES 46 VIA k (k = 1, 2, 3, 4, 5, 6) RULES 54 VIA 7, 8 RULES 55 LATCH-UP RULES 58 METAL k (k = 1, 2, 3, 4, 5, 6, 7, 8, 9) SLOT RULES 59 Metal1-9 Slot Spacing Check & Width Check - with context 59 Metal1-9/Metal1-9 Slot Enclosure Check 60 ANTENNA RULES 61 CMOS I/O Design Rules 83 ESD Design Rules 83 Bond Pad Design Rules 86 CMOS Digital Electrical Parameters 93 Sheet Resistances 93 Contact/Via Resistances 93 Sep 27, 2006 GPDK 90nm Mixed Signal Process Spec page iii revision 3.4 ...contents Current Densities 94 Contact/Via Current Densities 94 Layer and Dielectric Thickness 95 DF2 Layer Tables 98 Connectivity Definition 99 Appendix A A1 Appendix B B1 Sep 27, 2006 GPDK 90nm Mixed Signal Process Spec page 1 revision 3.4 Cadence Design Systems GPDK 90 nm Mixed Signal GPDK Spec DISCLAIMER The information contained herein is provided by Cadence on an "AS IS" basis without any warranty, and Cadence has no obligation to support or otherwise maintain the information. Cadence disclaims any representation that the information does not infringe any intellectual property rights or proprietary rights of any third parties. There are no other warranties given by Cadence, whether express, implied or statutory, including, without limitation, implied warranties of merchantability and fitness for a particular purpose. STATEMENT OF USE This information contains confidential and proprietary information of Cadence. No part of this information may be reproduced, transmitted, transcribed, stored in a retrieval system, or translated into any human or computer language, in any form or by any means, electronic, mechanical, magnetic, optical, chemical, manual, or otherwise, without the prior written permission of Cadence. This information was prepared for informational purpose and is for use by Cadence customers only. Cadence reserves the right to make changes in the information at any time and without notice. Sep 27, 2006...
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90nm DRM file - Sep 27, 2006 GPDK 90nm Mixed Signal Process...

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