TestBench4 and its usage

TestBench4 and its usage - TEST BENCH 4 AND ITS USAGE...

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TEST BENCH 4 AND ITS USAGE (2/18/2010) A new test bench named testBench4 has been added to project_115c library. It has the following features: 1. Provides a RESET signal which is a pulse that goes low for 400ps at the beginning of the first clock cycle. You should apply this RESET signal to the reset pins of your flip-flops corresponding to registers A and B so that A and B values are initialized to 0. Refer to Figure 1 for waveform and Figure 2 for connections. 2. Provides a START signal which is a pulse that goes low for 400ps at the beginning of second clock cycle. This should be applied to the set pin of least significant bit of register B. Refer to Figure 1 for waveform and Figure 2 for schematic connection. 3. Provides a 10-bit threshold value, pins T0 to T9, which should be used as input to comparator module. 4. Provides CLK (50ps rise time) and VDD. Supply voltage and clock frequency are under your control and you should set the corresponding variables Vsupply and Freq in your Analog Design
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This note was uploaded on 04/18/2010 for the course EE 115C taught by Professor N/a during the Spring '10 term at UCLA.

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TestBench4 and its usage - TEST BENCH 4 AND ITS USAGE...

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