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Unformatted text preview: solution: decrease registers, increase instruction size , decrease OP code drawback: resource spilling, complexity of coding will grow, decrease instruction problem: The execution time of our CPU with a signle-cycle datapath is too high solution: multicycle, pipelining drawback: complexity (more hardware such as more latches), increase CPI 2) lw IF ID EX M WB lw IF ID bne lw lw bne sw...
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- Spring '10