hw3_sol

hw3_sol - a ADDI Existing data and control path can support...

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Solution 4.7 4.7.1 The longest-latency path for ALU operations is through I-Mem, Regs, Mux (to select ALU operand), ALU, and Mux (to select value for register write). Note that the only other path of interest is the PC-increment path through Add (PC + 4)
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Implementation on single cycle data path:
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Unformatted text preview: a) ADDI Existing data and control path can support ADDI. 2. JR instruction Implement on Multi cycle data path 1. JAL C $31 = PC + 4; PC = PC+4[31:28] . C*4 2. Swap 3) MINC - memory increment - an I type instruction with the following effect: M[R[rs]+SES(I)]=M[R[rs]+SES(I)]+1...
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This note was uploaded on 04/18/2010 for the course CS 151B taught by Professor N/a during the Spring '10 term at UCLA.

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hw3_sol - a ADDI Existing data and control path can support...

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