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Lecture 03 Instruction Set Architectures

Lecture 03 Instruction Set Architectures - CS M151B EE...

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Reinman CSM151B 3-1 CS M151B / EE M116C Computer Systems Architecture Instruction Set Architectures Some notes adopted from Morgan Kaufman Publishing
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Reinman CSM151B 3-2 • That part of the architecture that is visible to the programmer – instruction formats – opcodes (available instructions) – number and types of registers – storage access, addressing modes – exceptional conditions The Instruction Set Architecture I/O system Instr. Set Proc. Compiler Operating System Application Digital Design Circuit Design Instruction Set Architecture Firmware Datapath & Control Layout
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Reinman CSM151B 3-3 Overall Goals of ISA • Can be implemented by simple hardware • Can be implemented by fast hardware • Instructions do useful things • Easy to write (or generate) machine code • We’ll be using the MIPS ISA
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Reinman CSM151B 3-4 Key ISA Decisions • Operations – how many? – which ones? – length? • Operands – how many? – location – types – how to specify? • Instruction format –s ize – how many formats? a = b + c destination operand operation
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Reinman CSM151B 3-5 Main ISA Classes •C I S C (“Complex Instruction Set Computers”) – Digital’s VAX (1977) and Intel’s x86 (1978) – large # of instructions – many specialized complex instructions •R I S C (“Reduced Instruction Set Computers”) – almost all machines of 80’s and 90’s are RISC • MIPS, PowerPC, DEC Alpha, IA64 – relatively fewer instructions – enable pipelining and parallelism
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Reinman CSM151B 3-6 Variable : Fixed : x86 – Instructions vary from 1 to 17 Bytes long VAX – from 1 to 54 Bytes MIPS, PowerPC, and most other RISC’s: all instruction are 4 Bytes long Instruction Length
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Reinman CSM151B 3-7 Instruction Length • Variable-length instructions (x86, VAX): - require multi-step fetch and decode + allow for a more flexible and compact instruction set (motivated by scarce instruction memory at the time) • Fixed-length instructions (RISC’s) + allow easy fetch and decode + simplify pipelining and parallelism - instruction bits are scarce • All MIPS instructions are 32 bits long
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Reinman CSM151B 3-8 • What does each bit mean? • Having many different instruction formats. .. – complicates decoding – uses instruction bits (to specify the format) Instruction Formats Some x86 ISA Formats
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Reinman CSM151B 3-9 MIPS Instruction Formats • for instance, add r1, r2, r3” has – OP=0, rs=2, rt=3, rd=1, sa=0, funct=32 – 000000 00010 00011 00001 00000 100000 • opcode (OP) tells the machine which format OP OP OP rs rt rd sa funct rs rt immediate target 6 bits 5 bits 5 bits 5 bits 5 bits 6 bits r format i format j format
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Reinman CSM151B 3-10 • Operands can be in registers or in memory • Registers –All computers have a small set of registers • Memory to hold values that will be used soon • Typical instruction will use 2 or 3 register values –Some advantages of a small number of registers: • It requires fewer bits to specify which one. • Less hardware
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Lecture 03 Instruction Set Architectures - CS M151B EE...

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