HardwareLab1

HardwareLab1 - Hardware Lab 1 Debugging Half Adder and Full...

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Hardware Lab 1 Debugging Half Adder and Full Adder Course: CSE120 Instructor: Lecture: Date Submitted:
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Hardware Lab # 1: Debugging a Half and Full Adder I. Introduction The objective of Lab 1 was to get familiarized with “building and debugging combinational logic circuits using TTL IC’s [1].” Also to gain experiencing with sum and carry functions for half adders using POS and SOP canonical forms. After completing this lab, I found that by using truth tables I could realize the outcomes of sum and carrying functions. Using this knowledge I could then build a schematic based upon which I could start building a half adder circuit. Finally using the experience gained in building a half adder I could then build, test, and debug a full adder. II. Experimental Results 1. Task 1: Building a 1-Bit Half-Adder 1. Task Statement Build a half adder using a design based on a gate level schematic formed from using a truth table to determine the POS sum and SOP cry functions. 2. Work Performed Before starting this task I had skecthed a gate level (POS SUM FUNCTION and SOP CRY FUNTION) and chip level schematics of the half adder using LogicWorks. Then once I was in the lab I used a digital training board along with a 7404 hex inverter, a 7408 2-input AND IC, and a 7432 2-input OR IC to build the half adder. The only problem I encountered was that the wires were very loose once a connection was made. I had to make sure to be careful on how I connected the wires and to try not to touch the wires that were already connected. POS SUM FUNCTION SOP CRY FUNCTION
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3. What I Learned I learned how to build a circuit, from evaluating a truth table, then building a schematic, and finally building the circuit on a digital training board. I also learned that connecting wires on the training board can be an art and I need to be very careful. Also having the schematics before attempting to build the circuit made my job much easier. 2. Task 2: Test the SUM and CRY of the 1-Bit Half-Adder with LED 1. Task Statement “Test each output (SUM and CRY) by trying all input combinations in my truth table [1].” If I did not produce the expected results then I would have to debug the circuit and find the problem.
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2. Work Performed I ran two trials and tried all possible combinations in both trials. My results
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HardwareLab1 - Hardware Lab 1 Debugging Half Adder and Full...

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