Unformatted text preview: General architecture and operation General architecture and operation
• 74LS194 (4 bit shift register) is used for loading & shifting 8 bit (4 bit shift register) is used for loading shifting bit data • We use D f/f (with asynchronous clear) to remember from when inverting is necessary • We use 74LS163 (a synchronous 4-bit counter) to count 8 shifts • The system controller determines when data should be loaded, system controller determines when data should be loaded, shifted or held by controlling S1 and S0 • The system controller also looks at BITFLG so as to know when to set the INVERT f/f to set the INVERT D f/f • The system controller also clears 74LS163 at the beginning, increments it each time a bit is shifted, and detects when 8 bits have been shifted. • Finally, the system controller asserts DONE signal ...
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This note was uploaded on 04/20/2010 for the course ECE 561 taught by Professor Orin,d during the Spring '08 term at Ohio State.
- Spring '08