6_pdfsam_Lecture4_7Updated-04052010

6_pdfsam_Lecture4_7Updated-04052010 - General architecture...

Info iconThis preview shows page 1. Sign up to view the full content.

View Full Document Right Arrow Icon
This is the end of the preview. Sign up to access the rest of the document.

Unformatted text preview: General architecture and operation General architecture and operation • 74LS194 (4 bit shift register) is used for loading & shifting 8 bit (4 bit shift register) is used for loading shifting bit data • We use D f/f (with asynchronous clear) to remember from when inverting is necessary • We use 74LS163 (a synchronous 4-bit counter) to count 8 shifts • The system controller determines when data should be loaded, system controller determines when data should be loaded, shifted or held by controlling S1 and S0 • The system controller also looks at BITFLG so as to know when to set the INVERT f/f to set the INVERT D f/f • The system controller also clears 74LS163 at the beginning, increments it each time a bit is shifted, and detects when 8 bits have been shifted. • Finally, the system controller asserts DONE signal ...
View Full Document

{[ snackBarMessage ]}

Ask a homework question - tutors are online