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• Sequential two’s complement machine
– Analyze a machine that takes the 2’s machine that takes the complement of an 8-bit number
• 8 bits in, START -> 8 bits out, DONE bits in START bits out DONE – More realistic example that uses MSI chips – For PLDs, FPGAs design, we usually use PLDs FPGAs design we usually use functional blocks (LBB – Logic Building Block) equivalent to the counters, shift Block) equivalent to the counters, shift registers, decoders, etc ...
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This note was uploaded on 04/20/2010 for the course ECE 561 taught by Professor Orin,d during the Spring '08 term at Ohio State.
- Spring '08