RISC_CISC - Technological Limitations leading to CISC...

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Technological Limitations leading to CISC design philosophy: CISC takes its name from the very large number of instructions (typically hundreds) and addressing modes in its ISA. In the 1970’s & 80’s memory was both slow and expensive. High cost and poor performance facilitated the need for compact and efficient code. (Assembly Language for direct execution) Code written in a high level language took much longer to translate into assembler, which lead to bloated code and slower program execution. The CISC philosophy was to shift some of the programming burden to the hardware level.
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CISC and Performance: time/program = [ (N=Code Size or instructions/program) x (cycles/instruction) x (time/cycle) ] CISC seeks to reduce the number of instructions executed to perform a task thereby increasing overall performance
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CISC Methodology: Use additional hardware to perform code translation and optimization. Complex instructions written in a high level language translate directly into exactly one instruction in assembler. Reduced difficulty in writing compilers, improve code compaction, and ease debugging. Saving of RAM due to less code size. Reduce software development costs as well as the size and complexity of programs/systems.
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CISC Attributes A 2-operand format, where instructions have a source and a destination. Register to register, register to memory, and memory to register commands. Multiple addressing modes for memory, including specialized modes for indexing through arrays Variable length instructions where the length often varies according to the addressing mode Instructions which require multiple clock cycles to execute. Variable
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This note was uploaded on 04/20/2010 for the course CS 102 taught by Professor Kp during the Spring '10 term at Jaypee University IT.

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RISC_CISC - Technological Limitations leading to CISC...

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