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# homework5 - EE4609 Spring 2009 Homework#5 1(a For the...

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EE4609 Spring 2009 Homework #5 1) (a) For the parallel end termination R A R L = Z o C V dd R A calculate the power dissipation (W) and current draw (A) when holding a logic high (as shown in above circuit) and the power dissipation (W) and current draw (A) when holding a logic low (lower FET turned on, upper one turned off)

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(b) Repeat the calculations of part (a) for the Thevinen termination R A C V dd 2Z o R A 2Z o
(c) Repeat the calculations of part (a) for the termination to a voltage where V TT = V dd / 2. R A C V dd Z o V TT R A

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2) (a) Let a periodic clock signal of magnitude 2.4 V and period T V c (t) 2.4 V T/2 T t be applied to the following interconnect C R term Z o , t d R S V(t) Let R S = 2 Ohm, Z o = 50 Ohm and C = 5 pF. Chose R term to provide a source termination to suppress reflections. Calculate the power dissipation (W) for the case 2t d = T/2.
(b) Remove R term and the transmission line from the circuit (i.e., directly connect the driver to the receiver (C)) C R S V(t)

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## This note was uploaded on 04/21/2010 for the course EE 4609 taught by Professor Staff during the Spring '08 term at Minnesota.

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homework5 - EE4609 Spring 2009 Homework#5 1(a For the...

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