chapter5 - Integrated Integrated Circuits Circuits A Design...

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© Digital Integrated Circuits 2nd Inverter Integrated Integrated Circuits Circuits A Design A Design Perspective Perspective The Inverter The Inverter Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic July 30, 2002
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© Digital Integrated Circuits 2nd Inverter The CMOS Inverter: A First Glance First Glance V in V out C L V DD
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© Digital Integrated Circuits 2nd Inverter CMOS Inverter CMOS Inverter Polysilicon In Out V DD GND PMOS 2 λ Metal 1 NMOS Out In V DD PMOS NMOS Contacts N Well
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© Digital Integrated Circuits 2nd Inverter Two Inverters Two Inverters Connect in Metal Share power and ground Abut cells V DD
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© Digital Integrated Circuits 2nd Inverter CMOS Inverter CMOS Inverter First-Order DC Analysis First-Order DC Analysis V OL = 0 V OH = V DD V M = f(R n , R p ) V DD V DD V in 5 V DD V in 5 0 V out V out R n R p
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© Digital Integrated Circuits 2nd Inverter CMOS Inverter: Transient Response Response t pHL = f(R on .C L ) = 0.69 R on C L V out V R n R p V DD V DD V in 5 V DD V 5 0 (a) Low-to-high (b) High-to-low C L C L
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© Digital Integrated Circuits 2nd Inverter Voltage Voltage Transfer Transfer Characteristi Characteristi c c
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© Digital Integrated Circuits 2nd Inverter PMOS Load Lines PMOS Load Lines V DSp I Dp V GSp =-2.5 V GSp =-1 V DSp I Dn V in =0 V in =1.5 V out I Dn V in =0 V in =1.5 V in = V DD +V GSp I Dn = - I Dp V out = V DD +V DSp V out I Dn V in = V DD +V GSp I Dn = - I Dp V out = V DD +V DSp
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© Digital Integrated Circuits 2nd Inverter CMOS Inverter Load Characteristics CMOS Inverter Load Characteristics I Dn V out V in = 2.5 V = 2 V = 1.5 V = 0 V = 0.5 V = 1 NMOS V V = 0.5 V V = 1.5 V V = 2.5 V V = 1.5 PMOS
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© Digital Integrated Circuits 2nd Inverter CMOS Inverter VTC CMOS Inverter VTC V out V in 0 . 5 1 1 . 5 2 2 . 5 0.5 1 1.5 2 2.5 NMOS res PMOS off NMOS sat PMOS sat NMOS off PMOS res NMOS sat PMOS res NMOS res PMOS sat
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© Digital Integrated Circuits 2nd Inverter function of Transistor Ratio Ratio 10 0 10 1 0.8 0.9 1 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 M V (V) W p /W n
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© Digital Integrated Circuits 2nd Inverter Determining V Determining V IH IH and V and V IL IL V OH V OL V in V out V M V IL V IH A simplified approach
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© Digital Integrated Circuits 2nd Inverter Inverter Gain Inverter Gain 0 0 .5 1 1 .5 2 2 .5 - 1 8 - 1 6 - 1 4 - 1 2 - 1 0 - 8 - 6 - 4 - 2 0 V in (V ) g a in
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© Digital Integrated Circuits 2nd Inverter Gain as a function of VDD Gain as a function of VDD 0 0 . 0 5 0 .1 0 .1 5 0 .2 0 0 . 0 5 0 . 1 0 . 1 5 0 . 2 V in (V ) V o u t (V ) 0 0 . 5 1 1 . 5 2 2 . 5 0 0 . 5 1 1 . 5 2 2 . 5 V in (V ) Gain=-1
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© Digital Integrated Circuits 2nd Inverter Simulated VTC Simulated VTC 0 0 .5 1 1 .5 2 2 .5 0 0 .5 1 1 .5 2 2 .5 V in (V) V out
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© Digital Integrated Circuits 2nd Inverter Impact of Process Variations Variations 0 0.5 1 1.5 2 2.5 0 0.5 1 1.5 2 2.5 V in (V) V out (V) Good PMOS Bad NMOS Good NMOS Bad PMOS Nominal
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© Digital Integrated Circuits 2nd Inverter Propagation Propagation Delay Delay
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© Digital Integrated Circuits 2nd Inverter Delay Delay Approach 1 Approach 1 V DD V out V in = V DD C L I av t pHL = C L V swing /2 I av C L k n V DD ~
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Inverter CMOS Inverter Propagation Delay Delay Approach 2 Approach 2 V DD V out R on C L t pHL = f(R on .C L ) = 0.69 R on C L t V out V DD R on C L 1 0.5 ln(0.5) 0.36
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This note was uploaded on 04/22/2010 for the course ECE ECE 165 taught by Professor Buckwalter during the Spring '09 term at UCSD.

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chapter5 - Integrated Integrated Circuits Circuits A Design...

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