InClassActivity07-sol - 2/7/03 4:24 PM Activity #07...

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2/7/03 4:24 PM ECSE-2660 Computer Architecture, Networks, & Operating Systems, Spring 2003 Page 1 of 2 Activity #07 (Solution) Activity 7.1 The single-cycle MIPS architecture For the reduced set of MIPS instructions { lw, sw, add, sub, and, or, slt, beq }, answer the following questions: a. (5 points) What minimum set of functions must the ALU need to perform to support this reduced set? Answer: add, subtract, set zero bit based on subtraction result, logical AND & OR, support for set on less than. b. (5 points) Given that 5bits are allowed for defining registers in the MIPS instruction formats, how many physical registers does a datapath unit need, in order to implement the above instruction set? Answer: 2 5 = 32 c. (5 points) What are the instruction formats used for this reduced set? Answer: R-type & I-type d. (5 points) How many registers can be read simultaneously? How many can be written simultaneously? Answer: Two can be read, one written. e. (5 points) What is the advantage of using a word (32 bits) offset instead of a byte offset? Answer: It increases the effective range of the offset field by a factor of four.
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InClassActivity07-sol - 2/7/03 4:24 PM Activity #07...

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