Io addresses the cpu gives a command to a device by

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Unformatted text preview: PC. On those rare occasions, you’ll need to understand I/O addresses, IRQs, DMAs, and memory to make changes as needed. Let’s look at each system resource in detail to understand what they are and how they work. I/O Addresses The CPU gives a command to a device by using a pattern of ones and zeroes called an I/O address. Every device responds to at least four I/O addresses, meaning the CPU can give at least four different commands to each device. The process of communicating through I/O addresses is called, quite logically, I/O addressing. Here’s how it works. The chipset extends the address bus to the expansion slots, which makes two interesting things happen. First, you can place RAM on a card, and the CPU can address it just as it can your regular RAM. Devices such as video cards come with their own RAM. The CPU draws the screen by writing directly to the RAM on the video card. Second, the CPU can use the address bus to talk to all of the devices on your computer through I/O addressing. Normally the address bus on an expansion bus works exactly like the address bus on a frontside busdifferent patterns of ones and zeroes point to different memory locations. If the CPU wants to send an I/O address, however, it puts the expansion bus into what can be called I/O mode. When the bus goes into I/O mode, all devices on the bus look for patterns of ones and zeroes to appear on the address bus. Back in the old Intel 8088 days, the CPU used an extra wire, called the input/output or memory (IO/MEM) wire, to notify devices that it was using the address bus either to specify an address in memory or to communicate with a particular device (Figure 8-14). You won’t find an IO/MEM wire on a modern CPU, as the process has changed and become more complex—but the concept hasn’t changed one bit. The CPU sends commands to devices by placing patterns of ones and zeroes—I/O addresses—on the address bus. No two devices share the same I/O address because that would defeat the entire concept. To make sure no two devices share I/O addresses, all I/O addresses either are ch08.indd 300 12/14/09 2:49:22 PM All-In-One / CompTIA Network+ All-in-One Exam Guide / Meyers & Jernigan / 170133-8 / Cha...
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This note was uploaded on 04/27/2010 for the course COMPTIA 1201 taught by Professor N/a during the Spring '10 term at Galveston College.

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