Suppl_CMOS - ECE 442 ECE 442 SolidState Devices &...

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CE 442 ECE 442 Solid CMOS Process Jose E. Schutt-Aine University of Illinois jschutt@emlab.uiuc.edu ECE 442–Jose Schutt Aine 1
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Basic Fabrication Process Chart Clean Rooms – Semiconductor processing is performed in ultraclean facilities called clean rooms – Sophisticated filtration to remove airbone particulates – Workers must wear special uniforms to minimize introduction of contaminants ECE 442–Jose Schutt Aine 2
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Clean Room Facility ECE 442–Jose Schutt Aine 3
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CMOS Process Steps Wafer Preparation – Crystal orientation, doping, polishing ypical wafers are 400 to 600 th ick Typical wafers are 400 m to 600 m thick Oxidation – Silicon reacts with oxygen to form silicon dioxide SiO 2 – Use high temperature (>1000 o C) to speed up process –S iO 2 is effective mask against impurities
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This note was uploaded on 05/05/2010 for the course ECE 329 taught by Professor Franke during the Spring '08 term at University of Illinois at Urbana–Champaign.

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Suppl_CMOS - ECE 442 ECE 442 SolidState Devices &...

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