This preview shows pages 1–8. Sign up to view the full content.
This preview has intentionally blurred sections. Sign up to view the full version.
View Full DocumentThis preview has intentionally blurred sections. Sign up to view the full version.
View Full DocumentThis preview has intentionally blurred sections. Sign up to view the full version.
View Full DocumentThis preview has intentionally blurred sections. Sign up to view the full version.
View Full Document
Unformatted text preview: MODULE 8 DIGITAL FILTER DESIGN I FIR Filter Design Windowing Frequency Sampling CAD: ParksMcClellan Algorithm Page 8.1 INDEX Digital Filter Flow Diagrams Cascade and Parallel Realization SecondOrder Sections Finite Impulse Response (FIR) Filter Design Advantages of FIR Filters Linear Phase Condition General Windowing Approach Rectangular (Truncation) Window Fundamental Window TradeOff Hamming, Hanning, Blackman Window Comparison of Windows Kaiser Window Design Kaiser LowPass Design Method FIR Design by Frequency Sampling Discrete Fourier Transform CAD  The ParksMcClellan Algorithm Minimax Design Criteria ParksMcClellan Specifications Chebyshev Polynomials Minimax Polynomial Approximation Alternation Theorem MAIN INDEX Page 8.2 8. DIGITAL FILTER DESIGN I index READ : Sections 6.06.5, 7.0, 7.27.6 of Oppenheim & Schafer. Work as many related problems as possible. Recall the generic LCCDE: y ( n ) = = K k 1 b ( k ) y ( nk ) + = M m a ( m ) x ( nm ). Every linear discretetime system/filter can be described by LCCDE's. Taking the twosided ZTransform of both sides of the LCCDE (not interested in transients or initial conditions) yields: Y ( z ) = = K k 1 b ( k ) zk Y ( z ) + = M m a ( m ) zm X ( z ) or H ( z ) = filter transfer function = ) ( ) ( z X z Y = k K k m M m z k z m a b = =  ) ( 1 ) ( 1 Page 8.3 Digital Filter Flow Diagrams index A digital filter H ( z ) can be expressed as a flow diagram implemented as a digital circuit in many different ways (circuit topologies). The following equivalent domaintodomain substitutions can be made: X ( z ) x ( n ) Y ( z ) y ( n ) z1 Unit Time Delay of course, not mixing up LHS notation with RHS notation. Page 8.4 Direct Form I Realization index Y ( z ) b ( K ) b (2) b (1) z1 z1 z1 X ( z ) a ( M ) a (2) a (0) a (1) z1 z1 z1 Feedforward Feedback This structure can be too sensitive to quantization errors the errors are summed, fed back and reamplified over and over. Hence rarely used in actual implementation  except for second order sections as will be explained. Page 8.5 Cascade or Series Realization index By factoring the numerator and denominator we can write H ( z ) = i =1 I H i ( z ) which can be drawn as a cascade of smaller sections: H I ( z ) H ( z ) H 1 ( z ) H 2 ( z ) Advantage : Smaller sections  less feedback error. Disadvantage : Errors fed from sectiontosection. Commonly used. Page 8.6 Parallel Realization index By performing a partial fraction expansion we can write H ( z ) = = I i 1 ) ( z H i which can be drawn as a parallel sum of smaller sections: H ( z ) H I ( z ) H 1 ( z ) H 2 ( z ) Advantages : Smaller sections  less feedback error....
View
Full
Document
 Spring '04
 AlanC.Bovik
 Digital Signal Processing, Frequency, Signal Processing

Click to edit the document details