Lecture26W_F

Lecture26W_F - Serial Driver Design: SCI0/ISR...

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Unformatted text preview: Serial Driver Design: SCI0/ISR Initialization Serial driver setup · Two steps - Configure HCS12 for interrupt service routine (ISR) - Configure SCI0 to generate interrupt request (IRQ) · Order of steps important ISR needs to be established before receiving IRQs from SCI0 SCI0 ISR installation · HCS12 interrupt vector table - Vectors for all IRQs - Need to update vector for SCI0 ISR · Put location of SCI0 ISR in interrupt vector table ORG DC.W · $FFD6 ; memory address for what follows SCI0_ISR ; label used for ISRàaddress ISR terminates in standard way F Note: not part of “installation”—end of actual ISR code rti Page 1 of 3 Serial Driver Design: SCI0/ISR Initialization Page 2 of 3 SCI0 initialization · Initialize SCI0 - Baud rate 9600 (same as for polling) SCI_9600H: EQU $00 SCI_9600L: EQU $0D movb #SCI_9600H,SCI0BDH movb #SCI_9600L,SCI0BDL - Protocol (8N1—same as for polling) SCI_8N: EQU %00000000 movb ;SCI0BD[12:8] ;SCI0BD[7:0] ; M=0 and PE=0 #SCI_8N,SCI0CR1 - Enable/disable (1/0) receive interrupt: bit 5 of SCI control register 2 - Enable/disable (1/0) transmit interrupt: bit 7 of SCI control register 2 - Initialize SCI0 for Rx interrupts (also enable Tx and Rx, as with polling) movb #(mSCI0CR2_RIE|mSCI0CR2_RE|mSCI0CR2_TE),SCI0CR2 Program startup pseudocode Initialize SP Mask interrupts from HCS12 devices Initialize SCI0 device Initialize any data structures associated with handling SCI0 interrupts Unmask interrupts from HCS12 devices Serial Driver Design: SCI0/ISR Initialization Page 3 of 3 Enabling transmit interrupts · Subroutine PutChar needs to enable Tx interrupts · “1” in bit 7 of SCI control register 2 enables Tx interrupt ; want to Rx IRQs, Tx IRQs, Rx, and Tx enabled movb # (mSCI0CR2_SCTIE|mSCI0CR2_RIE|mSCI0CR2_RE|mSCI0CR2_TE), SCI0CR2 Disabling transmit interrupts · ISR needs to disable Tx interrupts if TxQBuffer is empty · “0” in bit 7 of SCI control register 2 disables Tx interrupt ; want to leave Rx interrupts, Rx, and Tx enabled movb #(mSCI0CR2_RIE|mSCI0CR2_RE|mSCI0CR2_TE),SCI0CR2 SCI interrupt control · Note use of movb instruction to place values into SCI0CR2 · No need to disable receive interrupts in this application Program shutdown pseudocode Wait for TxQueue to become empty Mask interrupts from HCS12 devices ...
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This note was uploaded on 05/06/2010 for the course EECC 0306-250 taught by Professor Roymelton during the Fall '10 term at RIT.

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