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Lecture26W_F - Serial Driver Design SCI0/ISR Initialization...

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Page 1 of 3 Serial Driver Design: SCI0/ISR Initialization Serial driver setup Two steps - Configure HCS12 for interrupt service routine (ISR) - Configure SCI0 to generate interrupt request (IRQ) Order of steps important ISR needs to be established before receiving IRQs from SCI0 SCI0 ISR installation HCS12 interrupt vector table - Vectors for all IRQs - Need to update vector for SCI0 ISR Put location of SCI0 ISR in interrupt vector table ORG $FFD6 ; memory address for what follows DC.W SCI0_ISR ; label used for ISR ° address ISR terminates in standard way F Note: not part of “installation”—end of actual ISR code rti
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Serial Driver Design: SCI0/ISR Initialization Page 2 of 3 SCI0 initialization Initialize SCI0 - Baud rate 9600 (same as for polling) SCI_9600H: EQU $00 SCI_9600L: EQU $0D movb #SCI_9600H,SCI0BDH ;SCI0BD[12:8] movb #SCI_9600L,SCI0BDL ;SCI0BD[7:0] - Protocol (8N1—same as for polling) SCI_8N: EQU %00000000 ; M=0 and PE=0 movb #SCI_8N,SCI0CR1 - Enable/disable (1/0) receive interrupt: bit 5 of SCI control register 2 -
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  • Fall '10
  • RoyMelton
  • Interrupt, Interrupt request, Programmable Interrupt Controller, interrupt vector table, Serial Driver Design

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