lecture39 - 0306-250 Assembly Language Programming Lecture...

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Unformatted text preview: 0306-250 Assembly Language Programming Lecture Thirty-Nine: Computer Organization Digital Computer Organization Arithmetic Logic Unit Input Device Central Processing Unit Output Device Control Unit Clock Memory Unit Auxiliary Storage Device Central Processing Unit (CPU) • Arithmetic Logic Unit (ALU): Performs arithmetic and logical operations on data • Control Unit: Controls sequence of executing program instructions and data flow in system Memory Unit Stores program instructions and data Input and Output (I/O) Unit Interfaces CPU with outside world: keyboard, mouse, screen, switches, LEDs, etc.2 CPU Components 3 Control Unit 4 Generic CPU Machine Instruction Processing Steps Instruction Fetch Instruction Decode Operand Fetch Execute Result Obtain instruction from program memory The Program Counter (PC) points to the instruction to be processed Determine required actions and instruction size Locate and obtain operand data From data memory or registers Compute result value or status Store Deposit results in storage (data memory or register) for later use Next Determine successor or next instruction Instruction (i.e Update PC to fetch next instruction to be processed) Material used with permission from Dr. M. Shaaban, Dept. of Comp. Eng., RIT. 5 Hierarchy of Computer Architecture High-Level Language Programs Software Application Operating System Machine Language Program Software/Hardware Boundary Assembly Language Programs Compiler Firmware Instr. Set Proc. I/O system e.g. BIOS (Basic Input/Output System) Instruction Set Architecture (ISA) Datapath & Control Hardware Digital Design Circuit Design Microprogram Layout Logic Diagrams VLSI placement & routing Register Transfer Notation (RTN) Circuit Diagrams Material used with permission from Dr. M. Shaaban, Dept. of Comp. Eng., RIT. 6 Instruction Set Architecture (ISA) Instruction Specification Requirements Fetch Instruction Decode Operand Fetch Execute Result Store Next Instruction • Instruction format or encoding: – How is it decoded? • Location of operands and result (addressing modes): – Where other than memory? – How many explicit operands? – How are memory operands located? – Which ones can or cannot be in memory? • Data type and size • Operations – What is supported? • Successor instruction: – Next – Jumps, conditions, branches. • Fetch-decode-execute is implicit. Material used with permission from Dr. M. Shaaban, Dept. of Comp. Eng., RIT. 7 Interconnections 8 Memory Hierarchy: Motivation The Principle Of Locality • Programs usually access a relatively small portion of their address space (instructions/data) at any instant of time (program working set). Thus: 1 ® Memory Access Locality Program Working Set – Temporal Locality: If an item (instruction or data) is referenced, it will tend to be referenced again soon. • e.g. instructions in the body of inner loops 2 – Spatial locality: If an item is referenced, items whose addresses are close will tend to be referenced soon. • e.g. sequential instruction execution, sequential access to elements of array X • The presence of locality in program behavior (memory access patterns), makes it possible to satisfy a large percentage of program memory access needs (both instructions and data) using faster memory levels (cache) with much less capacity than program address space. Material used with permission from Dr. M. Shaaban, Dept. of Comp. Eng., RIT. 9 Memory Hierarchy Storage organization: Used with permission from support materials for The Essentials of Computer Organization and Architecture, Null and Labor, Jones and Bartlett Publishers, 2003. 10 ...
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This note was uploaded on 05/06/2010 for the course EECC 0306-250 taught by Professor Roymelton during the Fall '10 term at RIT.

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