EECC351_homework3_20092

EECC351_homework3_20092 - same as presented in the picture...

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EECC 351 HW #3 Due Wednesday 2/3/2010. Show your steps clearly and cleanly . 1. (100 pts) Write complete structural model of a generic n -bit shift register with parallel load. The register is composed of n multiplexers and DFFs. The size of the register is to be parameterized using a generic statement. To instantiate the components, use for and if generate statements. Use behavioral style to model multiplexer and DFF components. The interface of the DFF has to be exactly the
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Unformatted text preview: same as presented in the picture below. Simulate the model to verify its correctness for n=4. Q Q SET CLR D Q Q SET CLR D Q Q SET CLR D Q Q SET CLR D En En En En Mux2 Mux2 Mux2 Mux2 ... ... D(0) D(1) D(2) D(n-1) Q(0) Q(1) Q(2) Q(n-1) clk clear en mode serial_in serial_out...
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This note was uploaded on 05/06/2010 for the course EECC 0306-351 taught by Professor Marcinlukowiak during the Winter '10 term at RIT.

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