Syllabus_EECC0351_20092 - RIT - Department of Computer...

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RIT - Department of Computer Engineering -1- EECC 0306-351-01 Hardware Description Languages 20092 Instructor: Marcin Lukowiak, , Office: 09-3439 Phone: (585) 475-2808 Course Description: This lab-intensive course presents different approaches to the digital system modeling and design with the use of HDLs. The lab sessions include specification and design of combinational and sequential systems using VHDL and Verilog HDL. Industry-standard simulation and synthesis tools will be used during the term of the course, which will enable students gain hands-on experience. Prerequisites: 0306-341 – Introduction to Digital Systems Design Classes: M, W, R : 10.00 - 10.50am 09-3149 Labs: Monday : 2.00pm - 3.50pm 17-2500 (Lukowiak) Tuesday : 10.00am - 11.50am 17-2500 (Kudithipudi) Wednesday : 2.00pm - 3.50pm 17-2500 (Lopez Alarcon) Thursday : 10.00am - 11.50am 17-2500 (Kudithipudi) Lab Instructors/ TA’s: Contact CE lab manager - Mr. Richard Tolleson to establish access to the lab and computer account. email: ; Phone: (585) 475-5056, Office: 9-3411 Office hours: M, F : 9.00am - 9.50am W : 3.00pm - 3.50pm Textbook and materials: No text book is required.
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Online references: A classical introduction into VHDL and hardware design by Peter J. Ashenden Elaborated Reference to VHDL syntax A Hardware Engineer’s Guide to VHDL by Doulos Essential VHDL design examples Learn VHDL through examples by Weijun Zhang Reference textbooks: VHDL for Engineers, Kenneth L. Short, Prentice Hall, 2008 HDL Chip Design, Douglas J. Smith, Doone Publication, Ninth printing July 2001. Grade Weighting:
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This note was uploaded on 05/06/2010 for the course EECC 0306-351 taught by Professor Marcinlukowiak during the Winter '10 term at RIT.

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Syllabus_EECC0351_20092 - RIT - Department of Computer...

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