11 Oxidation 10

11 Oxidation 10 - Note: There is no quiz but some slides...

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Unformatted text preview: Note: There is no quiz but some slides have questions in yellow boxes which you must answer and submit as a work file for the lecture. Oxidation This lecture covers the oxidation of silicon Importance of silicon dioxide Silicon dioxide is a critical component of all integrated circuits The properties of its oxide distinguishes silicon from all other semiconductors MOS device operation depends on control of the Si-oxide interface Knowing how to grow or deposit oxide with the required characteristics is therefore vitally important! What does the ITRS say about oxide thickness from now until the end of the road? Put your answer in your work file Range of oxide thickness used in ULSI processing 1.0-5.0 Capacitors dielectric in DRAM circuits 6.0-15.0 Sacrificial oxides for gate applications 100-200 Masking film against implantat and diffusion 4.0-20.0 Inter-polysilicon dielectric 7.5-5.0 Re-oxidation of the etched gate stack 50-400 Field oxide for LOCOS isolation 15.0-40.0 Side-wall liners for shallow trench isolation (STI) 10.0-20.0 Screen oxides for ion implantation 3.0-10.0 Tunnel oxides in EEPROMs and flash memories 1.0-8.0 Gate oxide insulators for MOS devices Thickness (nm) Application ULSI definition is fuzzy - usually any process with CD < 0.5 micron DT DT W DT W DT Dep Dep DT DT Key: DT = dry thermal; W = wet thermal; Dep = deposited oxide Why is SiO 2 so useful? oxide silicon Simple reactions Dense adherent layer of oxide Good interface charge compensation Surface conductivity of Si almost unchanged Easy to maintain thickness uniformity Other reasons? Desired thermal oxide properties - 1 Good thickness uniformity across wafer First order influence on current and V t Aim for <2% variation in t ox Fortunately Thermal growth process provides intrinsic thickness uniformity - see later. 10 2 nm 2.10 8 nm wafer Atomic spacing is given later in this lecture go find it! Oxide tolerance Thickness Tolerance Atoms nm pm 1000 20000 500 10000 200 4000 10 200 5 100 3 60 2 40 Complete the following table: Gate Field Tolerance has been calculated as 2% of oxide thickness. Double click on table if you wish to open Excel Put the finished table in your work file Desired thermal oxide properties - 2 Integrity No pinholes Breakdown > 2 V/2 nm = 10 9 V/m 10 2 nm 2.10 8 nm 2 nm Channel is 50*200 pixels 10 8 pixels diam wafer Pixel = cube with side of gate oxide thickness 8.10 15 pixels area Desired thermal oxide properties - 3 Clean interface Low interface charge density No contamination 2-D representation of Si - SiO 2 interface Silicon Oxide Transition region,x Can you find any reference which quantifies the width of region, x?...
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This note was uploaded on 05/11/2010 for the course EEE EEE-530 taught by Professor Kozicki during the Spring '10 term at ASU.

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11 Oxidation 10 - Note: There is no quiz but some slides...

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