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25 DRAM 10

25 DRAM 10 - • DRAM is a 1 transistor memory technology...

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Unformatted text preview: • DRAM is a 1 transistor memory technology • Junction leakage and small capacitors mean frequent refresh is required • “Trench” and “stacked” variants currently manufactured DRAM This lecture covers the fabrication of various representative types of dynamic random access memory… Key DRAM features • Concept basically unchanged since 1974 • High capacitance cell (~30 fF) • Low leakage transistors (<10% charge loss) • Refresh every 100 msec • Large efficient array • Was technology driver for 20 years Simple concept - scaling “Bottomless” market “Easy” to design, inspect, test DRAM CD shrink 70 80 90 00 10 Log(Bits/die) 12 9 6 3 Year 4k 64k 1M 16M 256M 2.5 μ m 1 μ m 0.5 μ m 0.25 μ m 0.15 μ m, 4G 0.1 μ m, 16G Basic DRAM cell Bit line Word line Storage node Common ground Switch Write Turn transistor on Charge capacitor Read Turn transistor on Sense bit line Destructive read Must re-write Refresh Charge leakage Must top up 100 msec refresh Charging conditions...
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25 DRAM 10 - • DRAM is a 1 transistor memory technology...

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