26 BiCMOS 10

26 BiCMOS 10 - BiCMOS This lecture covers the integration...

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This “self-contained” lecture was developed by Dr. Robertson of ASU Polytechnic. It shows an important variation from the normal CMOS process There is no test for this lecture but you should know the key points. BiCMOS This lecture covers the integration of BJT devices with CMOS technology…
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BiCMOS Technology Why mix technologies? Process flow Enhancements for RF circuits
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Better performance More functionality Lower cost Achieve by: Scaling devices Combining more functions on chip eg Combining processes Bipolar + CMOS transistors Sensors + MCU Logic + power switch etc Customer expectations Can you think of any other process combinations ?
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Bipolar transistor (BJT) basics n+ p base n collector Original transistor structure Current flow is vertical i e = i c + i b Base layer is thin so carriers diffuse across it fast Little recombination occurs so base current is small w b must be greater than sum of depletion layers on both sides Gain is: w b h i i N N fe c b d e a b = , , i e i b i c Is this familiar? If not, do some revision - fast.
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SPICE representation g v be m b R c R C e C c + Vcc h fe Log (frequency) f t Plus parasitics Low-pass filter characteristic Compare to MOS representation. Beware proclamations of great f t values - WHY?
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Bipolar device fabrication n + p base n collector Log(N) p base n collector n collector Grow oxide, pattern and etch for base region Diffuse p-type base Grow oxide, pattern end etch for emitter. Diffuse heavy n + dopant How accurately can junction depth be controlled ?
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Key BJT attributes High emitter injection efficiency N d,e >> N a,b Small base width x b << w e + w c Reduce collector resistance Requires heavily doped buried layer deep under surface. Against the “rules”
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This note was uploaded on 05/11/2010 for the course EEE EEE-530 taught by Professor Kozicki during the Spring '10 term at ASU.

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26 BiCMOS 10 - BiCMOS This lecture covers the integration...

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