65nm_logic_press_briefing_0804

65nm_logic_press_briefing_0804 - 65 nm Press Release August...

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Intel Intel 1 65 nm Press Release August 2004 Intel's 65 nm Logic Technology Mark Bohr Intel Senior Fellow Director of Process Architecture & Integration 8/25/04
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Intel Intel 2 0.01 0.1 1 1980 1990 2000 2010 2020 micron 10 100 1000 nm 0.18 0.25 0.35 0.5 0.8 0.13 65 90 Performance Leakage Power Cost Active Power Dimension Control Mask Making Technology Challenges Lithography Challenges Scaling Gets Tougher at Smaller Dimensions
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Intel Intel 3 0.01 0.1 1 1980 1990 2000 2010 2020 micron 10 100 1000 nm 0.18 0.25 0.35 0.5 0.8 0.13 65 90 248nm 193nm Phase Shift EUV CoSi 2 , SiOF NiSi, Strain, Low-k Copper High-k Tri-Gate W Plug CMP STI 200mm 300mm Intel continues to develop and implement new materials and structures to meet the challenge Technology Enablers Lithography Enablers Scaling Gets Tougher at Smaller Dimensions
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Intel Intel 4 What are We Announcing Today? • Intel is disclosing details of its 65 nm generation logic technology which provides improved performance and reduced power: 1.2 nm transistor gate oxide 35 nm transistor gate length Enhanced strained silicon technology 8 layers of copper interconnect Low-k dielectric • This technology is being demonstrated on fully functional 70 Mbit SRAM chips with >0.5 billion transistors • Intel’s 65 nm technology is on track for delivery in 2005
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Intel Intel 5 Intel's Logic Technology Evolution Process Name Px60 P1262 P1264 P1266 P1268 Lithography 130nm 90nm 65nm 45nm 32nm Gate Length 70nm 50nm 35nm 25nm 18nm Wafer (mm) 200/300 300 300 300 300 1 st Production 2001 2003 2005 2007 2009 Moore's Law continues! Intel continues to introduce a new technology generation every 2 years
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Intel 6 Key Density Indicator Continues to Scale 0.1 1 10 1992 1994 1996 1998 2000 2002 2004 2006 Contacted Gate Pitch (micron) 0.7x every 2 years Pitch 0.7x linear scaling provides 2x transistor density improvement
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This note was uploaded on 05/11/2010 for the course EEE EEE-530 taught by Professor Kozicki during the Spring '10 term at ASU.

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65nm_logic_press_briefing_0804 - 65 nm Press Release August...

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