CSE230_Set07_Memory

CSE230_Set07_Memory - CSE230/EEE230 Computer Organization...

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Computer Science & Engineering Department Arizona State University Tempe, AZ 85287 Instructor: Dr. Baoxin Li baoxin.li@asu.edu Office: Brickyard 502 CSE230/EEE230 Computer Organization and Assembly Language Fall 2006
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2 Chapter 7 Large and Fast: Exploiting Memory Hierarchy Introduction (Section 7.1) The Basics of Caches (Section 7.2) Measuring and Improving Cache Performance (Section 7.3) Virtual Memory (Section 7.4) The focus will be on basic concepts illustrated with examples
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3 Illusion of Unlimited Fast Memory Fast, unlimited memory is a programmer’s dream but not a reality. How to create the illusion of such memory? The Library Analogy => Make Use of Locality Time: Temporal Locality If an item is referenced, it will tend to be referenced again soon. E.g. Probably need to look at the book you just used again soon Space: Spatial Locality If an item is referenced, items whose addresses are close by will tend to be referenced soon. E.g. The books from adjacent shelf
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4 Why Memory Hierarchy Cost, capacity, and speed need a cheapest and fastest memory with an infinite capacity Example: PC --- (data out of date, but illustrates the point) 256K cache SRAM -- $20, 0.5 - 5ns (~$0.08/Kbyte) 256M SIMM -- $60, 50-70ns (~$0.0003/Kbyte) 8Gb disk -- $80, 5-20ms (~$0.00001/Kbyte) Make the average access time small by: Servicing most accesses from a small, fast memory Save all data in a big, slow memory Move data between memory hierarchies when necessary (or as predicated) the mechanisms to control data movement
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5 Memory Hierarchy Control Datapath Memory Processor Memory Memory Memory Fastest Smallest Highest Slowest Biggest Lowest Speed: Size: Cost: (Disk) (Main) (L2 cache) (L1 cache) (Magneti c Disk) (DRAM) (SRAM) (SRAM)
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6 Memory Hierarchy: Another View Capacity Access Time Cost CPU Registers 100s Bytes <10s ns Cache K Bytes 10-20 ns $.00003/bit Main Memory M Bytes 50ns-100ns $.00001/bit Disk G Bytes ms 10 cents Tape infinite sec-min Registers Cache Memory Disk Tape Instr. Operands Blocks Pages Files Staging Transfer Unit prog./compiler 1-8 bytes cache control 8-128 bytes OS 512-8K bytes user/operator Mbytes faster larger
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7 What matters for the speed? Consider two adjacent levels at a time Block: The minimum unit of information that can be either present or not present in the two-level hierarchy. Hit: The data requested by the processor appears in some block in the upper level. Hit rate: The fraction of memory accesses found in a cache.
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This note was uploaded on 05/11/2010 for the course CSE/EEE CSE/EEE230 taught by Professor Baoxinli during the Fall '08 term at ASU.

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CSE230_Set07_Memory - CSE230/EEE230 Computer Organization...

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