lec7 - 1 Computer Programming I TA C162 25/01/07 Todays...

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Unformatted text preview: 1 Computer Programming I TA C162 25/01/07 Todays Contents Implementation of Combinational Logic Half Adder (Done!) Full Adder (Done!) Decoder Multiplexer Storage R-S Latch Register Memory 2 Computer Programming I TA C162 25/01/07 Decoder n inputs, 2 n outputs Exactly one output is 1 for each possible input pattern Example: Let n = 2 inputs then 4 outputs Bit patterns are 00 01 10 11 Logic Bit pattern O/P Line 00 1 01 2 10 3 11 4 3 Computer Programming I TA C162 25/01/07 Implementation of Decoder Logic 2-bit decoder 4 Computer Programming I TA C162 25/01/07 Uses of Decoder Useful to determine how to interpret a bit pattern Convert memory/register address to a control line that selects that location Convert an opcode to one of n control lines 5 Computer Programming I TA C162 25/01/07 Multiplexer (MUX) n-bit selector and 2 n inputs, one output Output equals one of the inputs, depending on...
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This note was uploaded on 05/14/2010 for the course CS SS ZG653 taught by Professor Shanta during the Spring '09 term at Birla Institute of Technology & Science.

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lec7 - 1 Computer Programming I TA C162 25/01/07 Todays...

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