tutorial9_short - repeat a How do you make the counter...

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ERG2020A Tutorial 9 Sequential System Design Examples [Questions ONLY version]
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2 Timing Analysis [CSC1410 96-97 Q7] Complete the waveform Y1 and SYNOUT for the given sequential circuit CK ASYNIN Y 1 SYNOUT S R D C ASYNIN Y 1 SYNOUT CK
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3 State Diagram & State Table [CSC1410 00-01 Q3] Draw a state diagram for the state machine whose behaviour is summarised in the following state (excitation) table. Don’t forget to show the don’t care terms. Marks will be deducted if “d’s” are not used at the appropiate arcs. (8%) Present State Present input X1 X0 S1 S0 00 01 10 11 0 0 A D/1 D/1 A/0 A/1 0 1 B C/1 C/1 B/1 A/1 1 0 C B/1 B/1 C/0 C/0 1 1 D A/1 C/0 A/0 C/0 Design the finite state machine using simple edge trigged D-type flip flops. Solve the two characteristic equations (Y1, Y0) for the next state and the output equation Z. Sketch the design. (8%)
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4 Arbitary Counter Design [CSC1410 98-99 Q7] Answer the following questions so that you can complete the design of a counter that can count the following binary (X0 X1 X2) sequence: 000 010 110 100 101 111 011 001 000 001 011 111 101 100 110 010
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Unformatted text preview: repeat a) How do you make the counter count two 000’s which is followed by different binary numbers? (2%) b) How many flip-flops do you need? (2%) c) Draw the transition table. (6%) d) Use positive edge triggered D-type flip-flops for your counter. Sketch the block diagram of your counter. (4%) e) Solve the equations for the inputs to flip flops X1 and X2. (6%) 5 Tutorial Questions [CSC1410 96-97 Q5] For the following sequential circuit, determine the output sequence for the input sequence X = 0 0 1 0 1 1 0 1 0 1 if the starting state is A. (4%) Draw a state diagram for the circuit. (4%) X = 0 X = 1 A B/0 C/1 B C/1 B/0 C A/0 A/1 6 Tutorial Questions (cont’) [CSC1410 96-97 Q9] Design a counter using edge triggered D-type flip-flops which will generate a two-bit output (X0 X1) in the following order. 0 1 2 3 3 2 1 0 2 3 1 0 1 3 2 0 1 2 3 … repeat...
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