HW9 - Page 2 a) decimal binary hit/miss action tag index...

Info iconThis preview shows pages 1–2. Sign up to view the full content.

View Full Document Right Arrow Icon
Sheet1 Page 1 HW9 Given the following sequences of word addresses, in decimal, 1, 4, 2, 8, 22, 4, 20, 3, 5, 24, 28, 19, 57, 1, 27, 3, 11 (no modification needed, just convert to binary 1 is 000001, 56 is 111000, etc, these are memory addresses) 1) Simulate an 8 word cache with one word per block, direct mapped. a) decimal binary hit/miss tag index 1 000 001 miss 4 000 100 miss 2 000 010 miss 8 001 000 miss 22 010 110 miss 4 000 100 hit 20 010 100 miss 3 000 011 miss 5 000 101 miss 24 011 000 miss 28 011 100 miss 19 010 011 miss 57 111 001 miss 1 000 001 miss 27 011 011 miss 3 000 011 miss 11 001 011 miss b) eight word cache, one word per block v tag data +-+---+----+ 000 |1|011|(24)| +-+---+----+ 001 |1|000|(1) | +-+---+----+ 010 |1|000|(2) | +-+---+----+ 011 |1|001|(11)| +-+---+----+ 100 |1|011|(28)| +-+---+----+ 101 |1|000|(5) | +-+---+----+ 110 |1|010|(22)| +-+---+----+ 111 |0| | | +-+---+----+ 2) Simulate a 16 word cache with four words per block, direct mapped.
Background image of page 1

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
Sheet1
Background image of page 2
This is the end of the preview. Sign up to access the rest of the document.

Unformatted text preview: Page 2 a) decimal binary hit/miss action tag index word 1 00 00 01 miss set valid, load data (0)(1)(2)(3) 4 00 01 00 miss set valid, load data (4)(5)(6)(7) 2 00 00 10 hit no action 8 00 10 00 miss set valid, load data (8)(9)(10)(11) 22 01 01 10 miss wrong tag, load data (20)(21)(22)(23) 4 00 01 00 miss 20 01 01 00 miss 3 00 00 11 hit no action 5 00 01 01 miss 24 01 10 00 miss wrong tag, load data (24)(25)(26)(27) 28 01 11 00 miss set valid, load data (28)(29)(30)(31) 19 01 00 11 miss 57 11 10 01 miss wrong tag, load data (54)(55)(56)(57) 1 00 00 01 miss 27 01 10 11 miss 3 00 00 11 hit no action 11 00 10 11 miss b) sixteen word cache, four words per block data v tag 00 01 10 11 +-+---+----+----+----+----+ 00 |1| 00|( 0)|( 1)|( 2)|( 3)| +-+---+----+----+----+----+ 01 |1| 00|( 4)|( 5)|( 6)|( 7)| +-+---+----+----+----+----+ 10 |1| 00|( 8)|( 9)|(10)|(11)| +-+---+----+----+----+----+ 11 |1| 01|(28)|(29)|(30)|(31)| +-+---+----+----+----+----+...
View Full Document

Page1 / 2

HW9 - Page 2 a) decimal binary hit/miss action tag index...

This preview shows document pages 1 - 2. Sign up to view the full document.

View Full Document Right Arrow Icon
Ask a homework question - tutors are online