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Unformatted text preview: EE200(class EE200(class EE200(class EE200(class 13 13 13 13-2) Prof. M.M. Dawoud Prof. M.M. Dawoud Prof. M.M. Dawoud Prof. M.M. Dawoud 124 EE200 DIGITAL LOGIC CIRCUIT DESIGN Class Notes CLASS 13-2 The material covered in this class will be as follows: ⇒ Design of a sequence detector. ⇒ Synthesis using D flip-flops. ⇒ Synthesis using JK flip-flops. ⇒ Design of a binary counter using T flip-flop. Design Of A Sequence Detector We wish to design a circuit that detects three or more consecutive 1’s in a string of bits coming through an input line. We start in the initial state S . If the input is 0 then the circuit stays in S . the first input 1 will take the circuit to the next state S 1 . Any input 0 will take the circuit back to state S . Only three consecutive 1’s will take the circuit through the states S , S 1 , S 2 , and S 3 . Any further 1’s will leave the circuit in state S 3 . The state diagram is shown below 0 0 S /0 S 1 /0 S 2 /0 S 3 /1 1 0 1 0 1 1 EE200(class EE200(class EE200(class EE200(class 13 13 13 13-2) Prof. M.M. Dawoud Prof. M.M. Dawoud Prof. M.M. Dawoud Prof. M.M. Dawoud 125 Synthesis using D flip-flops...
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This note was uploaded on 05/21/2010 for the course EE EE200 taught by Professor Prof.ahmed during the Spring '09 term at King Fahd University of Petroleum & Minerals.
- Spring '09