# 21 - EE200 DIGITAL LOGIC CIRCUIT DESIGN Class Notes CLASS...

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EE200(class 10-1) Prof. M.M. Dawoud 97 AC C B A C B F + + = 1 2 () FA B A B C ′′ =+ EE200 DIGITAL LOGIC CIRCUIT DESIGN Class Notes CLASS 10-1 The material covered in this class will be as follows: Programmable logic devices. Programmable Logic Array (PLA). Programmable Array Logic (PAL). Programmable Logic Array (PLA) The following PLA implements the two functions: The fuse map of the PLA can be shown in a programming table, which is shown next.

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EE200(class 10-1) Prof. M.M. Dawoud 98 ∑∑ = = ) 7 , 6 , 5 , 0 ( ) , , ( ) 4 , 2 , 1 , 0 ( ) , , ( 2 1 C B A F and C B A F C B C A B A F + + = 1 BC AC AB F + + = 1 Inputs Outputs Product terms A B C F 1 F 2 1 B’C’ - 0 0 1 - 2 AB 1 1 - - 1 3 A’BC’ 0 1 0 1 1 4 AC 1 - 1 1 - True / Complement Æ T C Combinational Circuit Implementation with PLA When implementing combinational circuit using PLA, we must reduce the number of product terms. Number of literals in each product term is not important because all variables and their complements are available.
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• Spring '09
• prof.ahmed
• Logic gate, Programmable logic device, PLA, Programmable logic array, Programmable Array Logic, Prof. M.M. Dawoud

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21 - EE200 DIGITAL LOGIC CIRCUIT DESIGN Class Notes CLASS...

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