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Unformatted text preview: EE EE EE EE200 200 200 200(class class class class 9-1) Prof. M.M. Dawoud Prof. M.M. Dawoud Prof. M.M. Dawoud Prof. M.M. Dawoud 84 I I 1 S Y EE200 DIGITAL LOGIC CIRCUIT DESIGN Class Notes CLASS 9-1 The material covered in this class will be as follows: ⇒ Multiplexers. ⇒ Boolean function implementation. ⇒ Three-state gates. ⇒ HDL for combinational circuits. ⇒ Gate level modelling. Multiplexers A multiplexer is a combinational circuit that selects one of many input lines ( normally 2 n lines) and directs it to a single output line. The selection of a particular input line is controlled by a set of selection lines ( normally n selection lines). 2-to-1 Line Multiplexer A 2-to-1 line multiplexer has two inputs, one selection line and one output. This is shown in the following logic circuit. EE EE EE EE200 200 200 200(class class class class 9-1) Prof. M.M. Dawoud Prof. M.M. Dawoud Prof. M.M. Dawoud Prof. M.M. Dawoud 85 3 1 2 1 1 1 1 I S S I S S I S S I S S Y + ′ + ′ + ′ ′ = 4-to-1 Line Multiplexer A 4-to-1 line multiplexer consists of four AND gates. Each input is connected to one AND gate. Selection lines S1 and S0 are decoded to select a particular AND gate. The outputs of the AND gates are applied to a single OR gate that provides the output of the multiplexer Y. The output of the multiplexer is then given by: The function table of the multiplexer is shown next....
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- Spring '09
- Gate, Logic gate, Prof. M.M. Dawoud