13 - EE200 DIGITAL LOGIC CIRCUIT DESIGN Class Notes CLASS...

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EE200(class 6-2&3) Prof. M.M. Dawoud 48 EE200 DIGITAL LOGIC CIRCUIT DESIGN Class Notes CLASS 6-2&3 The material covered in this class will be as follows: NAND and NOR Implementation Two level implementation Multilevel NAND circuits Two level and multilevel NOR implementation Other two-level implementations NAND and NOR Implementation Digital circuits are frequently constructed with NAND or NOR gates rather than with AND or OR gates. NAND and NOR gates are easier to fabricate with electronic components and are the basic gates used in all IC digital logic families. NAND Circuits The basic AND, OR, and NOT gates can be implemented using NAND gates only. x x' x y x y x y (x'y')' = x+y Inverter AND OR Logic Operations with NAND gates
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EE200(class 6-2&3) Prof. M.M. Dawoud 49 Two equivalent graphic symbols for NAND gate are shown below: x y z x y z x'+y'+z' = (xyz)' (xyz)' Two Graphic Symbols for NAND gate Example 1: Implement F = AB + CD using NAND gates A B C D F A B C D A
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This note was uploaded on 05/21/2010 for the course EE EE200 taught by Professor Prof.ahmed during the Spring '09 term at King Fahd University of Petroleum & Minerals.

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13 - EE200 DIGITAL LOGIC CIRCUIT DESIGN Class Notes CLASS...

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