q2_fall02_sol

q2_fall02_sol - Department of Electrical Engineering and...

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Unformatted text preview: Department of Electrical Engineering and Computer Science MASSACHUSETTS INSTITUTE OF TECHNOLOGY 6.097 Operating System Engineering: Fall 2002 Quiz II All problems are open-ended questions. In order to receive credit you must answer the question as precisely as possible. You have 80 minutes to answer this quiz. Write your name on this cover sheet AND at the bottom of each page of this booklet. Some questions may be much harder than others. Read them all through first and attack them in the order that allows you to make the most progress. If you find a question ambiguous, be sure to write down any assumptions you make. Be neat. If we cant understand your answer, we cant give you credit! THIS IS AN OPEN BOOK, OPEN NOTES QUIZ. 1 (xx/20) 2 (xx/20) 3 (xx/20) 4 (xx/20) 5 (xx/20) Total (xx/100) Name: I 6.097 FALL 2002, Quiz 2 Solutions Page 2 of 10 Fast mutual exclusion A common way to implement concurrent inserts is using an atomic TSL (Test-Set-and-Lock) instruction: List *list = NULL; int insert_lock = 0; insert(int data) { /* acquire the lock: */ while(TSL(&insert_lock) != 0) ; /* critical section: */ List *l = new List; l->data = data; l->next = list; list = l; /* release the lock: */ insert_lock = 0; } Many processors support an atomic cmpxchg instruction. This instruction has the following semantics: int cmpxchg(addr, v1, v2) { int ret = 0; // stop all memory activity and ignore interrupts if (*addr == v1) { *addr = v2; ret = 1; } // resume other memory activity and take interrupts return ret; } Name: 6.097 FALL 2002, Quiz 2 Solutions Page 3 of 10 1. [5 points]: Give an implementation of insert using the cmpxchg instruction. insert (int data) { List *l = new List; l->data = data; do { l->next = list; } while (!cmpxchg (&list, l->next, l)); } 2. [5 points]: Why is the implementation of insert with cmpxchg preferable over the one with TSL ? The cmpxchg version is wait free. There is no chance for a deadlock because there are no locks. Name: 6.097 FALL 2002, Quiz 2 Solutions Page 4 of 10 3. [5 points]: Give an implementation of cmpxchg using a restartable atomic sequence. int cmpxchg_RAS(addr, v1, v2) { int ret = 0; BEGIN RAS if (*addr == v1) { *addr = v2; END RAS ret = 1; } return ret; } 4. [5 points]: Can you extend the insert() routine to insert nodes into a doubly linked list using cmpxchg and without using locks? If so, give the code, otherwise explain why not. struct List { List *next; List *prev; int data; }; You can not just use cmpxchg to insert into a doubly linked list because the insert into list operations: insert(int data) { // Prepare new element List *l = new List; l->data = data; l->prev = NULL; // Insert into list l->next = list; list->prev = l; list = l; } require two externaly visible memory writes. Even if require two externaly visible memory writes....
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q2_fall02_sol - Department of Electrical Engineering and...

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