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q2_fall06_sol - Department of Electrical Engineering and...

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Department of Electrical Engineering and Computer Science MASSACHUSETTS INSTITUTE OF TECHNOLOGY 6.828 Operating System Engineering: Fall 2006 Quiz II All problems are open-ended questions. In order to receive credit you must answer the question as precisely as possible. You have 80 minutes to answer this quiz. Write your name on this cover sheet AND at the bottom of each page of this booklet. Some questions may be much harder than others. Read them all through first and attack them in the order that allows you to make the most progress. If you find a question ambiguous, be sure to write down any assumptions you make. Be neat. If we can’t understand your answer, we can’t give you credit! THIS IS AN OPEN BOOK, OPEN NOTES QUIZ. In addition to this test booklet, you should have received a copy of selected files from the JOS Lab 6 distribution, which you may use for reference while answering the quiz questions. Please do not write any answers in those pages; that packet is yours to keep. 1 (xx/10) 2 (xx/10) 3 (xx/20) 4 (xx/20) 5 (xx/20) 6 (xx/15) 7 (xx/5) Total (xx/100) Name: Solution Set Quiz score statistics: median 81, mean 80, maximum 98.
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6.828 FALL 2006, quiz II Page 2 of 14 I Papers 1. [10 points]: True or false? A. T / F : According to Liedtke in “Improving IPC performance by kernel design” a designer should exploit processor-specific features to get better IPC performance, sacrificing portability. B. T / F : Disco (as described in “Disco: Running Commodity Operating Systems on Scalable Multiprocessors”) pays a high overhead for TLB faults when running IRIX because the IRIX kernel occupies more TLB entries when running on Disco instead of on the physical hardware. C. T / F : On a symmetric multiprocessor with a small number of processors and low contention, the time for acquiring an Mellor-Crummey & Scott (MCS) lock (as described in the “Algorithms for scalable synchronization on shared-memory multiprocessors”) will be lower than a test-and- set lock with exponential back-off. D. T / F : The methods described in “Bugs as Deviant Behavior: a general approach to inferring errors in systems code” can reliably determine which line of code contains an error. E. T / F : Adding IPv6 support to Plan 9 (as described in “Plan 9 from Bell Labs”) would require recompiling all the network client programs (telnet, ssh, etc.) to be IPv6-aware. A. True. Liedtke strongly advocates to specialize the kernel implementation to exploit features of the underling hardware, in this case the x86. One x86 feature used is the page directory for fast temporary mappings. B. True. Irix on Disco will incur more TLB faults than Irix on the physical hardware, because under Disco kernel addresses must be translated while on the physical hardware the kernel is in an untrans- lated part of the memory.
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q2_fall06_sol - Department of Electrical Engineering and...

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