HW5-sol - Q 1 had right before the clock edge, and Q 1...

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EE 2301 S 2010 INTRODUCTION TO DIGITAL SYSTEMS DESIGN HOMEWORK # 5 (15 pts) Due Mar 23, 2010 1. 2. 3.
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b) Y Present State Next State Output A B X=0 X=1 X=0 X=1 A B A B Z Z 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 1 0 1 0 1 1 0 0 0 0 0 1 1 1 1 0 1 0 1 1 0 0 0 0 1 0 0 0 1 0 1 0 0 1 1 0 1 1 1 0 1 1 1 0 0 0 1 1 1 1 1 1 1 0 1 4. 5. Notice that this is a shift register. At each falling clock edge, Q 3 takes the value Q 2 had right before the clock edge. Q 2 takes on the value
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Unformatted text preview: Q 1 had right before the clock edge, and Q 1 takes on the value X had right before the clock edge. For example, if the initial state is 000 and the input sequence is X = 1100, the state sequence is = 100,110,011,001, and the output sequence is Z = (0)0011. Z is always Q 3 , which does not depend on the present value of X. So it s a Moore machine. 6. a) Starting State is B, output is 1110101. b) Starting State is C, output is 0011101...
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HW5-sol - Q 1 had right before the clock edge, and Q 1...

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