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13 Nanoelectronic, Macroelectronics, transparent electronics

13 Nanoelectronic, Macroelectronics, transparent...

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Nanoelectronics, Macroelectronics, Transparent Electronics Lecture-13 MSE316 Feb. 19, 2009 Reading: Goldhaber-Gordon’s article (uploaded)
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Moore’s Law
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The Barriers Towards Nanoscale Electronics 1) How to make nanoscale size devices? - Fundamental limit of photolithography: λ /2, ~70 nm? 2) How do the nanoscale devices behave? - What are the problems in nanodevices? 3) What are the new device concepts?
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pn Junctions
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Schottky Barrier
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Metal-Oxide Semiconductor FET The Two Functions of Transistors: - Switching - Amplification MOSFETs: Excellent scaling
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Characteristics of MOSFET - Mobility of Si: n-type,1000 cm 2 /Vs; p-type, 100 cm 2 /Vs, determining the speed - On-state current: determining the speed. - Sub-threshold swing: thermodynamics limit 60 mV/decade, amplification gain.
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Limitations of Nanoscale Si MOSFET 1). Fabrication of small size: - Limit of lithography: UV, EUV, X-ray - Etching: non-uniformity 2). High electric field: avalanche breakdown 3). Heat dissipation 4). Non-uniform doping: 10 18 /cm 3 (dopant separated by 10 nm) 5). Shrinkage and unevenness of the thin oxide layer
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Intel 20 nm Transistors
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