Voltage Regulator Selection for FPGAs
November 2008, ver. 1.0
As FPGAs increase in sophistication to provide additional features such as phase-locked loops (PLLs), memory
interfaces, and transceiver functionality, the power requirements and designs for FPGAs are becoming more
challenging. These include multiple power rails for specialty blocks and circuitry, multiple voltage levels, and
increased current requirements. This paper discusses how to identify the various rails associated with Altera
analyze the power requirements, and select the appropriate voltage regulator modules, then walks through a design
example for a Stratix
FPGA Voltage Rails
As a first step in determining regulator selection, all of the voltage rails that the FPGA needs must be identified.
These voltages are available via a pin list (commonly provided by the FPGA vendor), which identifies every power
pin, provides definitions of each type, and specifies the required voltage levels.
shows a sample pin list for a
Stratix IV GX device.
Figure 1. Stratix IV GX Pin Table Excerpt
This example only identifies a few of the FPGA voltage rails. There are a number of different voltages an FPGA may
need to operate, including:
Core voltage, at which the internal logic array operates
I/O voltages, which drive the I/O buffers. The I/O pins can support a range of voltages. The I/Os are grouped in
banks, each of which can operate at a different voltage. I/O reference voltages are generated from the I/O voltage.
PLL voltages, which power the analog and digital circuitry for the PLLs located in the core
Transceiver voltages, which power the digital and analog circuitry of the transceiver, receiver, and transmitter
paths, and transceiver I/O buffers
Voltage Rail Requirements
There are various parameters to take into consideration when selecting a voltage regulator. The current consumption
requirement is the most important and should be considered first, followed by shared and isolated voltage rails, then
regulator accuracy and ripple specifications.