x9258ts24_INTERSIL - X9258 Low Noise/Low Power/2-Wire...

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1 ® X9258 Low Noise/Low Power/2-Wire Bus/256 Taps Quad Digital Controlled Potentiometers (XDCP™) FEATURES • Four potentiometers in one package • 256 resistor taps/pot–0.4% resolution • 2-wire serial interface • Wiper resistance, 40 typical @ V+ = 5V, V- = -5V • Four nonvolatile data registers for each pot • Nonvolatile storage of wiper position • Standby current < 5μA max (total package) • Power supplies —V CC = 2.7V to 5.5V —V+ = 2.7V to 5.5V —V- = -2.7V to -5.5V • 100k , 50k total pot resistance • High reliability —Endurance – 100,000 data changes per bit per register —Register data retention – 100 years • 24-lead SOIC, 24-lead TSSOP • Dual supply version of X9259 DESCRIPTION The X9258 integrates 4 digitally controlled potentiometers (XDCP) on a monolithic CMOS integrated circuit. The digitally controlled potentiometer is implemented using 255 resistive elements in a series array. Between each element are tap points connected to the wiper terminal through switches. The position of the wiper on the array is controlled by the user through the 2-wire bus interface. Each potentiometer has associated with it a volatile Wiper Counter Register (WCR) and 4 nonvolatile Data Registers (DR0:DR3) that can be directly written to and read by the user. The contents of the WCR controls the position of the wiper on the resistor array though the switches. Power up recalls the contents of DR0 to the WCR. The XDCP can be used as a three-terminal potentiometer or as a two-terminal variable resistor in a wide variety of applications including control, parameter adjustments, and signal processing. BLOCK DIAGRAM Interface and Control Circuitry SCL SDA A0 A1 A2 A3 R 0 R 1 R 2 R 3 Wiper Counter Register (WCR) Resistor Array Pot 1 V H1 /R H1 V L1 /R L1 R 0 R 1 R 2 R 3 Wiper Counter Register (WCR) V H0 /R H0 V L0 /R L0 Data 8 V W0 /R W0 V W1 /R W1 R 0 R 1 R 2 R 3 Resistor Array V H2 /R H2 V L2 /R L2 V W2 /R W2 R 0 R 1 R 2 R 3 Resistor Array V H3 /R H3 V L3 /R L3 V W3 /R W3 Wiper Counter Register (WCR) Wiper Counter Register (WCR) Pot 3 Pot 2 WP Pot 0 V CC V SS V+ V- CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-352-6832 | Intersil (and design) is a registered trademark of Intersil Americas Inc. XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005. All Rights Reserved All other trademarks mentioned are the property of their respective owners. Data Sheet FN8168.1 May 6, 2005
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2 FN8168.1 May 6, 2005 PIN DESCRIPTIONS Host Interface Pins SERIAL CLOCK (SCL) The SCL input is used to clock data into and out of the X9258. SERIAL DATA (SDA) SDA is a bidirectional pin used to transfer data into and out of the device. It is an open drain output and may be wire-ORed with any number of open drain or open collector outputs. An open drain output requires the use of a pull-up resistor. For selecting typical values, refer to the guidelines for calculating typical values on the bus pull-up resistors graph.
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x9258ts24_INTERSIL - X9258 Low Noise/Low Power/2-Wire...

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