{[ promptMessage ]}

Bookmark it

{[ promptMessage ]}

SFU - CMPT 150 - Lectures - Week 13

SFU - CMPT 150 - Lectures - Week 13 - 107 41 RELATIVE...

Info iconThis preview shows pages 1–4. Sign up to view the full content.

View Full Document Right Arrow Icon
107 41 RELATIVE ADDRESSING MODE The Branch Instructions of the HC-12 employ a special mode that permits the branching information to be represented in one byte, rather than two as would be the case if a 16-bit address were to be needed as the operand of the instruction. That mode is called relative mode and all branching instructions use the mode for interpreting the operand field. Relative mode instructions are examples of instructions where an address that is needed (i.e., the “effective address”) is not actually provided as the operand of the instruction. Rather than providing an operand as an address, the operand provided is a dis- placement that is used in calculating the address where control should be trans- ferred. The operand is a signed integer between -128 and 127 that is added to the program counter. This controls where the next instruction will be retrieved from. The displacement specifies how many memory locations the ”destination” (the location to which you want to branch) is from the current instruction. For relative mode instructions the effective address (E.A.) is computed from the 8-bit displacement, and the calculation is given by: E.A. = current instruction location + 2 + Displacement The “current instruction location” is also called the “branch-instruction address”. More specifically, at the time of execution, the program counter will be pointing at the instruction following the branch instruction. Since branch instructions are normally 2 bytes, the value in the PC will be the address of the branch instruction + 2. To compute the displacement value stored in the second byte of the branch in- struction, evaluate the expression: displacement = destination address - (branch-instruction address + 2)
Background image of page 1

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full Document Right Arrow Icon
108 Consider the following program: ; Program to sum the first ; N positive integers (N = 10) ; ORG $0000 SUM : ds.b 1 N: dc.b 10 ORG $0800 LDAA #0 ;IMM mode LDAB N ;DIR mode LOOP: ABA ;INH mode ADDB #$FF ;IMM mode BNE LOOP ;REL mode STAA SUM ;DIR mode SWI ;INH mode NOP END The corresponding machine code for this program is: 0000 -- 0001 0A E000 86 E001 00 E002 D6 E003 01 E004 1B E005 CB E006 FF E007 26 E008 FB E009 97 E00A 00 E00B 3F and the symbol table is: SUM 0000 N 0001 LOOP 0804 Thus in the example machine code program, the displacement value that is the operand of the BNE instruction is FB . To see what location is obtained as the
Background image of page 2
109 effective address, using this displacement: $FB = 1111 1011 (2’s complement) = -(0000 0100 + 1) = -5 The branch-inst addr = $0807 Effective addr = $0807 + 2 + (-5) = $0804 Therefore the BNE instruction will branch to location $0804 if the Z bit in the CCR is ’0’. Inspection of the Symbol Table reveals that the address of LOOP is indeed $0804 . 42 THE SP REGISTER The HC-12 provides instructions that allow the programmer to use part of main memory as a stack memory. In order to do this, the programmer is provided access to the TOP of the stack via the “stack pointer register”. This register is equivalent to TOP.
Background image of page 3

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full Document Right Arrow Icon
Image of page 4
This is the end of the preview. Sign up to access the rest of the document.

{[ snackBarMessage ]}