L2 - Computer Architecture and Design ECEN 350 Part 2...

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Unformatted text preview: Computer Architecture and Design ECEN 350 Part 2 Instruction Set Architecture (ISA) and MIPS Example Dr. G. Choi Dept. of Electrical and Computer Engineering [ Some original slides adapted from M. Irwin, D. Paterson and others] The Instruction Set Architecture (ISA) instruction set architecture software hardware The interface description separating the software and hardware How Do the Pieces Fit Together? I/O system Processor Compiler Operating System Applications Digital Design Circuit Design Instruction Set Architecture Firmware b Coordination of many levels of abstraction b Under a rapidly changing set of forces b Design, measurement, and evaluation Memory system Datapath & Control network MIPS Architecture b Components are familiar bits and pieces from 248.. The MIPS ISA b Instruction Categories c Load/Store c Computational c Jump and Branch c Floating Point- coprocessor c Memory Management c Special R0 - R31 PC HI LO OP OP OP rs rt rd sa funct rs rt immediate jump target b 3 Instruction Formats: all 32 bits wide Registers Assembly Language Instructions b The language of the machine c Want an ISA that makes it easy to build the hardware and the compiler while maximizing performance and minimizing cost b Stored program (von Neumann) concept c Instructions are stored in memory (as is the data) b Our target: the MIPS ISA c similar to other ISAs developed since the 1980s Design goals: maximize performance, minimize cost, reduce design time (time-to-market), minimize memory space (embedded systems), minimize power consumption (mobile systems) RISC - Reduced Instruction Set Computer b RISC philosophy c fixed instruction lengths c load-store instruction sets c limited number of addressing modes c limited number of operations b MIPS, Sun SPARC, HP PA-RISC, IBM PowerPC b Instruction sets are measured by how well compilers use them as opposed to how well assembly language programmers use them b CISC (C for complex), e.g., Intel x86 The Four Design Principles 1. Simplicity favors regularity. 2. Smaller is faster. 3. Make the common case fast. 4. Good design demands good compromises. The MIPS ISA b Instruction Categories c Load/Store c Computational c Jump and Branch c Floating Point- coprocessor c Memory Management c Special R0 - R31 PC HI LO Registers $zero constant 0 (Hdware) 1 $at reserved for assembler 2 $v0 expression evaluation & 3 $v1 function results 4 $a0 arguments 5 $a1 6 $a2 7 $a3 8 $t0 temporary: caller saves . . . (callee can clobber) 15 $t7 Naming Conventions for Registers 16 $s0 callee saves . . . (caller can clobber) 23 $s7 24 $t8 temporary (contd) 25 $t9 26 $k0 reserved for OS kernel 27 $k1 28 $gp pointer to global area 29 $sp stack pointer 30 $fp frame pointer 31 $ra return address (Hdware) MIPS Arithmetic Instruction b MIPS assembly language arithmetic statement add $t0, $s1, $s2 sub $t0, $s1, $s2 b Each arithmetic instruction performs only one operation b Each arithmetic instruction specifies exactly three operands destination...
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This note was uploaded on 06/29/2010 for the course ECEN 350 taught by Professor Sprintston during the Spring '09 term at Texas A&M.

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L2 - Computer Architecture and Design ECEN 350 Part 2...

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