Unformatted text preview: EECE 416/501 Analog Circuit Design Introduction Christopher M. Twigg
Assistant Professor BINGHAMTON
U N I V E R S I T Y
STATE UNIVERSITY OF NEW YORK Department of Electrical and Computer Engineering August 26, 2009 Intro: Course Information (1) Instructor Dr. Christopher M. Twigg [email protected] EB-P16 (Office hours TR 1:30 to 2:30) Location Lecture, LN 1120, TR 11:40 to 1:05 Laboratory, EB-E2A, during lecture + open hours Website Primary http://reaper.ws.binghamton.edu/ctwigg/eece416.shtml Report submissions through BlackBoard's drop box Recommended Text(s)
1. P. R. Gray, P. J. Hurst, S. H. Lewis, R. G. Meyer, Analysis and Design of Analog Integrated Circuits, 5th Ed., John Wiley, ISBN# 9780470245996. 2. B. Razavi, Design of Analog CMOS Integrated Circuits, McGraw-Hill, 2001, ISBN# 9780072380323. 3. P. E. Allen and D. R. Holberg, CMOS Analog Circuit Design, 2nd Ed., Oxford University Press, 2002, ISBN# 0195116445. 4. R. J. Baker, CMOS Circuit Design, Layout, and Simulation, Second Edition, Wiley-IEEE Press, 2005, ISBN# 9780471700555.
EECE 416/501, C. M. Twigg August 26, 2009 2/6 Intro: Course Information (2) Course Outcomes Upon completing this course, the student should be able to... intuitively analyze arbitrary BJT and CMOS circuits. design a basic CMOS amplifier using industrial CAD tools. compare multiple circuit designs and choose the one that best fits a specified application. professionally communicate the results of individual and group projects. Grading Exam 1 Exam 2 Projects Presentations Random Quizzes 20% 20% 40% 10% 10% A AB+ B BC+ C CD F 93% 90% 87% 83% 80% 77% 73% 70% 60% 0% Grades are calculated automatically! EECE 416/501, C. M. Twigg August 26, 2009 3/6 Intro: Course Information (3) Projects Groups of 2+ Cadence-based IC design, simulation, and physical layout MATLAB-based analysis Hardware labs (if available in time) Approximately 4 - 5 projects + final project Reports/Summaries No longer than 4 pages (concise) Professional (consistent formatting, well-written, clear figures) Submitted to BlackBoard's dropbox for time stamp Late penalty (1% per minute) Presentations Same groups as the projects Primarily use computer-based slides with board as a supplement Peer evaluated (technical and presentation content)
EECE 416/501, C. M. Twigg August 26, 2009 4/6 Intro: Academic Honesty Policy All students must adhere to the Student Academic Honesty Code of the University and the Watson School. The Department of Electrical and Computer Engineering has adopted a standard policy to enforce these codes for violations involving course work. Category I violations result in a grade of 0 for the graded work plus a full letter grade reduction for the course. A Report of Category I Academic Dishonesty form is filed with the Provost's Office; if a prior report is already on file, the offense is automatically elevated to Category II. Category II violations result in at least a failing grade for the course plus any additional penalties determined by the Watson Academic Integrity Committee. http://bulletin.binghamton.edu/program.asp?program id=826 http://www.binghamton.edu/watson/Watson Academic Honesty Policy.pdf http://www.ece.binghamton.edu/documents/Academic Honesty Policy.pdf Group Discussion What is academic misconduct? EECE 416/501, C. M. Twigg August 26, 2009 5/6 Intro: Levels of Analog Design
H(f) cos(2 f) ADC I Systems LNA -sin(2 f) H(f) VDD ADC Q Vi- Circuits
Vb Ib Vi+ I+ Vo I- vo Physical Layout
vdd vi gnd
S iO 2 Devices / Processing
EECE 416/501, C. M. Twigg VS VD August 26, 2009 6/6 ...
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This note was uploaded on 06/30/2010 for the course EECE 501 taught by Professor Twigg during the Fall '09 term at Binghamton.
- Fall '09