p1 - EECE 416/501 Fall 2009 Project 1 Introduction to the...

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EECE 416/501 Project 1 Due 10/01/2009 Fall 2009 Introduction to the Cadence Design Tools, Part I This project is to be completed individually. Academic Honesty Policy All students must adhere to the Student Academic Honesty Code of the University and the Watson School. The Electrical and Computer Engineering Department has adopted a standard policy to enforce these codes for course work violations. Category I violations result in a grade of 0 for the graded work plus a full letter grade reduction for the course. A Report of Category I Academic Dishonesty form is filed with the Provost's Office; if a prior report is already on file, the offense is automatically elevated to Category II. Category II violations result in at least a failing grade for the course plus any additional penalties determined by the Watson Academic Integrity Committee. Goal and General Description The purpose of this project is to introduce you to the Cadence Virtuoso custom integrated circuit tools. As part of this introduction, you will be drawing schematics and performing simulations using Spectre through the Cadence interface. Procedure Schematic Entry With Cadence running and your library selected, create a new schematic by selecting File => New => Cell View… in the library manager. Fill in the Cell Name and make sure schematic appears under the View Name box and the tool is Composer-Schematic . Press OK to create the new cell and open the blank schematic. In the schematic window, select Add => Instance… (or press the i hotkey) to bring up two windows. In the component browser (left), select N_Transistors and then click on nmos4 , which should fill in the Add Instance window (right) with the selected device. You can scroll down and change the various parameters of the device as needed. Change the width and length parameters of the nmos4 transistor to both be 3.6u M and 1.2u M , respectively. With these options set, go back to your schematic window and click anywhere to place the transistor. Press ESC to quit creating instances. In a similar manner, add the pmos4 (width/length the same as the nmos4), a 1 pF capacitor ( cap ), DC voltage sources ( vdc) , and the ground supply net ( gnd) , to the schematic as seen in the following schematic (ignore wires and labels). Note, you will have to search through the various component categories to find these. 9/23/2009 1/8
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EECE 416/501 Project 1 Due 10/01/2009 Fall 2009 Introduction to the Cadence Design Tools, Part I While adding your instances, it may be useful to change the zoom. Press shift-z to zoom out, ctrl-z to zoom in, or f to “fit” the schematic to the screen. Although known as an inverter in the digital design realm, this circuit can also be classified as a high-gain amplifier. For small changes in the input, we observe large changes in the output signal. However, this is not a particularly good high-gain amplifier in an analog sense, as you will see later. You can move any object using the
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This note was uploaded on 06/30/2010 for the course EECE 501 taught by Professor Twigg during the Fall '09 term at Binghamton University.

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p1 - EECE 416/501 Fall 2009 Project 1 Introduction to the...

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