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pf - EECE 416/501 Fall 2009 Final Project Amplifier Design...

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EECE 416/501 Fall 2009 Final Project Amplifier Design Due 12/16/2009 This project is to be completed in groups of 2. Academic Honesty Policy All students must adhere to the Student Academic Honesty Code of the University and the Watson School. The Department of Electrical and Computer Engineering has adopted a standard policy to enforce these codes for violations involving course work. Category I violations result in a grade of 0 for the graded work plus a full letter grade reduction for the course. A Report of Category I Academic Dishonesty form is filed with the Provost’s Office; if a prior report is already on file, the offense is automatically elevated to Category II. Category II violations result in at least a failing grade for the course plus any additional penalties determined by the Watson Academic Integrity Committee. Goal and General Description The purpose of this project is to demonstrate the ability to design and analyze a differential amplifier circuit given a set of desired specifications. This project will require all of the skills learned in the previous projects and in the class. A secondary goal is to provide an opportunity to visually/orally present one’s findings in front of an audience of one’s peers. As such, the grade will be split between a technical portion and a presentation grade. The technical portion will contribute 3 times as much toward your project grade as compared to the previous projects, and the presentation will be 75% of your total presentation grade. The means that the final project will be approximately 26% of your overall grade, so take it very seriously. Amplifier Specifications You are to design and generate the layout for a single-ended output, differential amplifier. Use the same table of parameters from your previous projects for any hand calculations that you might do. The specifications for this amplifier are described in Table 1. Table 1: Amplifier Specifications Specification Undergraduate (416) Graduate (501) Supply Voltage 5 V 5 V Power 1 mW 10 mW Load capacitance (C L ) 1 pF 10 pF Area for 2 amps and pads 1 mm x 1 mm 1 mm x 1 mm DC gain (A vd ) 80 dB 100 dB Output range 4.0 V 4.5 V Unity Gain Bandwidth (GBW) 1 MHz 10 MHz Phase margin (PM) 55 65 Slew Rate (SR) 10 V/ μ s 10 V/ μ s You may use any circuit topology you wish, and you need not be limited by what we have discussed in class. These are the minimum requirements for your design, and they may or may not be achievable. This
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