Lecture13a - Lecture 13 FLIP-FLOPS Topics Clocked S-R...

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Lecture 13. FLIP-FLOPS Objectives: Topics: Describe operation of flip-flops Determine input and output signals Design simple flip-flop circuits Clocked S-R Flip-Flops J-K Flip-Flops Circuit Examples
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Clocked S-R Flip-Flops 1 2 3 4 - has an additional clock input for synchronization Q S R C Q 0 0 1 1 0 1 0 1 RR ` C Gate 1 0 0 1 1 0 1 0 1 ` C Gate 2
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Clocked S-R Flip-Flops (Continued) Q Q R` S` 1 2 3 4 Identical (NAND) gates could be used Q C S R R S C
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J-K Flip-Flops - made from SR flip-flops. Elimitates ambiguity when S=1 and R=1 Q S R C Q J K a) J=0, K=0 b) J=1, K=0 c) J=0, K=1 d) J=1, K=1 Q S = Q R = If Q=1, , then 0 = Q If Q=0, , then 1 = Q
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Master-Slave J-K Flip-Flops Q S R Q Q S R Q C C Q S R C Q J=1 K=1 If J=1 and K=1 for too long, race- around will happen: Flip-flop will toggle again and again
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This note was uploaded on 06/30/2010 for the course EECE 315 taught by Professor Nikulin during the Fall '08 term at Binghamton.

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Lecture13a - Lecture 13 FLIP-FLOPS Topics Clocked S-R...

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