Lecture14a

# Lecture14a - A 1 R 1 R 1 R 1 V 2 V 1 V OUT Monostable-mode...

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Lecture 14. TIMER CIRCUITS Objectives: Topics: Describe operation of multivibrators Describe operation of 555 timers Select circuit parameters to generate clock signals Multivibrator Circuits 555 Timer

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Multivibrator Circuits Monostable configuration (“one-shot” circuit) +5 C R V in V 1 V out V 2 +5 C R V 1 V out V 2 +5 C R V 1 V out V 2 a) b) - single pulse of a certain duration in response to trigger input a) @t=0 V in =0: b) @t=t 1 V in =5V: ( ) RC t DD C e V V V / 2 1 = = c) @t=t 2 : V 2 becomes large (logic ‘1’ level) - circuit returns to original state a)
Monostable Circuit V in V C V out V DD V DD v IN 0 V DD v OUT V DD V IC V IC c a b ( ) RC t DD C e V V / 1 = (use CMOS with symmetric characteristic V IC =V DD /2) Pulse duration = T ( ) RC T DD DD IC e V V V / 1 2 / = = - solve for T:

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Astable configuration (sustained square-wave oscillations) C R V 1 V out V 2 - trigger signal is not needed C R V 1 V out V 2 C R V 1 V out V 2 a) @t=0 V out =5V: c) @t=t 2 : b) @t=t 1 V 2 =V IC : C starts charging toward 5V -+ -+ C starts discharging V 2 decreases a) and b) repeats over and over again Time to charge = T/2, time to discharge = T/2
555 Timer Q R S Q + - A 1 + -

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Unformatted text preview: A 1 R 1 R 1 R 1 V 2 V 1 V OUT Monostable-mode configuration Trigger – active low a) @t=0 V T =5V: → V out =0V b) @t=t 1 V T =0V: → S=5V → V out =5V c) @t=t 2 : Capacitor voltage exceeds 2V DD /3 V in V C V out V DD V DD Output pulse duration = time to charge C from V sat to 2V DD /3 Astable-mode configuration Q R S Q +-A 1 +-A 1 R 1 R 1 R 1 V 2 V 1 V OUT V 1 =2V DD /3 V 2 =V DD /3 a) @t=0: C charges through R A and R B toward 5V Capacitor voltage is low → S=5V, R=0V b) @t=t 1 : V C >2V DD /3 → S=0V, R=5V C discharges through R B toward V sat c) @t=t 2 : V C <V DD /3 Same as a) (repeats) V C V out V DD V DD t 1 t 2 t L V sat Duration of HI output = time to charge C from V DD /3 to 2V DD /3 Duration of LO output = time to discharge C from 2V DD /3 to V DD /3 t H EXAMPLE : 1MHz, 60% duty cycle T=1/f=1 µ s...
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Lecture14a - A 1 R 1 R 1 R 1 V 2 V 1 V OUT Monostable-mode...

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