EE477-HW8-Nazarian-Spring2009

EE477-HW8-Nazarian-Spring2009 - 3. What is the size of the...

Info iconThis preview shows page 1. Sign up to view the full content.

View Full Document Right Arrow Icon
1 EE 477L Homework 8 Spring 2009 Nazarian Name: _________________________________________ Lecture 9:30 Assigned: Sunday April 26, 2009 Score: ________ 1. What are the key parameters considered in memory design? Area efficiency, memory access time, and power consumption Read slide #2 for more details and the definitions of the above parameters. 2. What characteristic makes EPROM and E 2 PROM different from other types of ROM memories? They can be rewritten even if they are in the family of ROMs (however note that the number of time one can rewrite them is limited.)
Background image of page 1
This is the end of the preview. Sign up to access the rest of the document.

Unformatted text preview: 3. What is the size of the row decoder for a 32 kbit memory (128 rows and 256 columns?) Its a 7-to-128 decoder 4. What are the two fabrication techniques of making a NOR-based ROM array? 1) Metal-to-diffusion contacts can be removed to realize a bit 1, using a mask 2) Using a mask, transistors can be selectively implanted such that their voltage threshold is increased to have a permanent off transistor (read slides 31 to 36 for more details.) 5. Example 10.1 Review slides 37 to 42....
View Full Document

This note was uploaded on 07/21/2010 for the course EE- 477 taught by Professor Shahinnazarian during the Spring '09 term at USC.

Ask a homework question - tutors are online