ChapterVIII-SequentialMOSLogicCircuits-EE477-Nazarian-Spring09

# ChapterVIII-SequentialMOSLogicCircuits-EE477-Nazarian-Spring09

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University of Southern California Sequential MOS Logic Circuits Nazarian EE477L – Spring 2009 Nazarian/EE477L/Spring 2009

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Sequential MOS Logic Circuits Output levels of a combinational logic circuit at any time are directly determined as Boolean functions of theapplied input variables Combinational logic circuits do not have the capability of storing any previous event or displaying an output behavior which is dependent upon the previously applied inputs Circuits of this type are also called non-regenerative circuits, since there is no feed back relationship between output and input he ther ajor lass f gic ircuits alled The other major class of logic circuits is called sequential circuits, in which the output is determined by the present inputs as well as reviously pplied puts Nazarian/EE477L/Spring 2009 previously applied inputs 2
Types of Sequential Circuits There are three types for yp sequential circuits: Bistable Monostable Astable Nazarian/EE477L/Spring 2009 3

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Behavior of Bistable Elements he ircuit onsists f o entical ross- oupled The circuit consists of two identical cross coupled inverters The output voltage of inverter (1) is the input voltage of inverter (2) and vice versa, inother words, we have: 2 1 i o v v = Nazarian/EE477L/Spring 2009 1 2 i o v v = 4
Bistable Elements (Cont.) To characterize this circuit, we plot the voltage transfer characteristics of oth verters sing e both inverters using the same pair of axes The two voltag et r a n s f e r characteristics intersect at three points Only two of these operating points are stable Nazarian/EE477L/Spring 2009 5

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Qualitative Reasoning for Bistablity If the circuit is initially working in one of these two stable points, it ill reserve is tate nless will preserve this state unless it is forced to change its operation point The gain of each inverter circuit, i.e., the slope of the respective voltagetransfercurves ,issma l ler than unity at both of these stable points herefore ufficiently rge Therefore, a sufficiently large external voltage perturbation is required for the voltage gain of e verter op ecome rger Nazarian/EE477L/Spring 2009 the inverter loop to become larger than unity 6
Bistablity (Cont.) At the third operating point, however, the voltage gains for both inverters are larger than unity If thecircuit is initially biased in thispoint ,asmall voltage perturbation causes this operating point to move to one of the stable points Nazarian/EE477L/Spring 2009 7

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Bistablity (Cont.) The bistable behavior of this circuit can also be explained qualitatively by examining the potential level at each of the three possible operating points It is seen that the potential energy is at its minimum at two of the three operating points, since the voltage gains of both inverters are equal to ero t ese oints zero at these points There is also a maximum energy point corresponding to the point at which the oltage ain f oth verter re voltage gain of both inverter are maximum
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## ChapterVIII-SequentialMOSLogicCircuits-EE477-Nazarian-Spring09

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